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author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2021-10-14 17:57:04 +0200 |
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committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-10-19 12:26:02 +0530 |
commit | 4c1add1fb20fe07b827227ca34f63f176774d51c (patch) | |
tree | 6f191cb95c848d7bbf2268231cc62f7d8719f0d0 /hw/phys-map.c | |
parent | 2d89dd334756d19a9ffc3e4c784406177f46c053 (diff) | |
download | skiboot-4c1add1fb20fe07b827227ca34f63f176774d51c.zip skiboot-4c1add1fb20fe07b827227ca34f63f176774d51c.tar.gz skiboot-4c1add1fb20fe07b827227ca34f63f176774d51c.tar.bz2 |
pau: Add support for OpenCAPI Persistent Memory devices.
Lowest Point of Coherency (LPC) memory allows the host to access memory on
an OpenCAPI device.
When the P10 chip accesses memory addresses on the AFU, the Real Address
on the PowerBus must hit a BAR in the PAU such as GPU-Memory BAR. The BAR
defines the range of Real Addresses that represent AFU memory.
The two existing OPAL calls, OPAL_NPU_MEM_ALLOC and OPAL_NPU_MEM_RELEASE
are used to manage the AFU momory.
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'hw/phys-map.c')
-rw-r--r-- | hw/phys-map.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/hw/phys-map.c b/hw/phys-map.c index 711d626..cfce4ab 100644 --- a/hw/phys-map.c +++ b/hw/phys-map.c @@ -30,7 +30,12 @@ static const struct phys_map_entry phys_map_table_p10[] = { /* System memory upto 4TB minus GPU memory */ { SYSTEM_MEM, 0, 0x0000000000000000ull, 0x0000034000000000ull }, - /* TODO: Figure out GPU memory */ + /* Configure OpenCapi memory as before with the old chips. + * Keep in mind that we would need to rework this by allocating + * a new topology id. + */ + { OCAPI_MEM, 0, 0x0002000000000000ull, 0x0000040000000000ull }, + { OCAPI_MEM, 1, 0x0002040000000000ull, 0x0000040000000000ull }, /* 0 TB offset @ MMIO 0x0006000000000000ull */ { PHB5_64BIT_MMIO, 0, 0x0006000000000000ull, 0x0000004000000000ull }, |