phb4: Disable TCE cache line buffer

This patch implements a circumvention for HW557787. It disables the
TCE cache line buffer as, under heavy loads, there's a possibility of
an entry being re-allocated incorrectly.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/hw/phb4.c b/hw/phb4.c
index 818eb17..5563415 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -5303,6 +5303,7 @@ static void phb4_init_hw(struct phb4 *p)
 
 	/* Init_17 - PHB Control */
 	val = PHB_CTRLR_IRQ_PGSZ_64K;
+	val |= PHB_CTRLR_TCE_CLB_DISABLE; // HW557787 circumvention
 	val |= SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_2_PER_PE);
 	if (PHB4_CAN_STORE_EOI(p))
 		val |= PHB_CTRLR_IRQ_STORE_EOI;