Change user-defined _MASK/_LSH to just mask

The last patch changed the SETFIELD() and GETFIELD() macros to automatically
calculate the shift of a given mask, so manually specifying the shift is no
longer needed.  Additionally, any masks should have the _MASK suffix removed
since the GETFIELD() and SETFIELD() operations expected to be passed the
mask name without the _MASK suffix (and so either the mask name or the
get/setfield call needs to have its mask name changed).

Change all _MASK masks to remove the _MASK suffix, except for any places
that leaving _MASK makes sense (e.g. already an existing define without
_MASK suffix).

Remove all _LSH defines, as they are no longer needed.

Signed-off-by: Dan Streetman <ddstreet@ieee.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 15 insertions, 30 deletions

diff --git a/hw/p8-i2c.c b/hw/p8-i2c.c
index f7074ad..47efafd 100644
--- a/hw/p8-i2c.c
+++ b/hw/p8-i2c.c
@@ -66,8 +66,7 @@ DEFINE_LOG_ENTRY(OPAL_RC_I2C_RESET, OPAL_INPUT_OUTPUT_ERR_EVT, OPAL_I2C,
 
 /* I2C FIFO register */
 #define I2C_FIFO_REG			0x4
-#define I2C_FIFO_MASK			PPC_BITMASK(0, 7)
-#define I2C_FIFO_LSH			PPC_BITLSHIFT(7)
+#define I2C_FIFO			PPC_BITMASK(0, 7)
 
 /* I2C command register */
 #define I2C_CMD_REG			0x5
@@ -75,19 +74,15 @@ DEFINE_LOG_ENTRY(OPAL_RC_I2C_RESET, OPAL_INPUT_OUTPUT_ERR_EVT, OPAL_I2C,
 #define I2C_CMD_WITH_ADDR		PPC_BIT(1)
 #define I2C_CMD_READ_CONT		PPC_BIT(2)
 #define I2C_CMD_WITH_STOP		PPC_BIT(3)
-#define I2C_CMD_DEV_ADDR_MASK		PPC_BITMASK(8, 14)
-#define I2C_CMD_DEV_ADDR_LSH		PPC_BITLSHIFT(14)
+#define I2C_CMD_DEV_ADDR		PPC_BITMASK(8, 14)
 #define I2C_CMD_READ_NOT_WRITE		PPC_BIT(15)
-#define I2C_CMD_LEN_BYTES_MASK		PPC_BITMASK(16, 31)
-#define I2C_CMD_LEN_BYTES_LSH		PPC_BITLSHIFT(31)
+#define I2C_CMD_LEN_BYTES		PPC_BITMASK(16, 31)
 #define I2C_MAX_TFR_LEN			0xfff0ull
 
 /* I2C mode register */
 #define I2C_MODE_REG			0x6
-#define I2C_MODE_BIT_RATE_DIV_MASK	PPC_BITMASK(0, 15)
-#define I2C_MODE_BIT_RATE_DIV_LSH	PPC_BITLSHIFT(15)
-#define I2C_MODE_PORT_NUM_MASK		PPC_BITMASK(16, 21)
-#define I2C_MODE_PORT_NUM_LSH		PPC_BITLSHIFT(21)
+#define I2C_MODE_BIT_RATE_DIV		PPC_BITMASK(0, 15)
+#define I2C_MODE_PORT_NUM		PPC_BITMASK(16, 21)
 #define I2C_MODE_ENHANCED		PPC_BIT(28)
 #define I2C_MODE_DIAGNOSTIC		PPC_BIT(29)
 #define I2C_MODE_PACING_ALLOW		PPC_BIT(30)
@@ -95,17 +90,14 @@ DEFINE_LOG_ENTRY(OPAL_RC_I2C_RESET, OPAL_INPUT_OUTPUT_ERR_EVT, OPAL_I2C,
 
 /* I2C watermark register */
 #define I2C_WATERMARK_REG		0x7
-#define I2C_WATERMARK_HIGH_MASK		PPC_BITMASK(16, 19)
-#define I2C_WATERMARK_HIGH_LSH		PPC_BITLSHIFT(19)
-#define I2C_WATERMARK_LOW_MASK		PPC_BITMASK(24, 27)
-#define I2C_WATERMARK_LOW_LSH		PPC_BITLSHIFT(27)
+#define I2C_WATERMARK_HIGH		PPC_BITMASK(16, 19)
+#define I2C_WATERMARK_LOW		PPC_BITMASK(24, 27)
 
 /* I2C interrupt mask, condition and interrupt registers */
 #define I2C_INTR_MASK_REG		0x8
 #define I2C_INTR_COND_REG		0x9
 #define I2C_INTR_REG			0xa
-#define I2C_INTR_ALL_MASK		PPC_BITMASK(16, 31)
-#define I2C_INTR_ALL_LSH		PPC_BITLSHIFT(31)
+#define I2C_INTR_ALL			PPC_BITMASK(16, 31)
 #define I2C_INTR_INVALID_CMD		PPC_BIT(16)
 #define I2C_INTR_LBUS_PARITY_ERR	PPC_BIT(17)
 #define I2C_INTR_BKEND_OVERRUN_ERR	PPC_BIT(18)
@@ -135,16 +127,14 @@ DEFINE_LOG_ENTRY(OPAL_RC_I2C_RESET, OPAL_INPUT_OUTPUT_ERR_EVT, OPAL_I2C,
 #define I2C_STAT_DATA_REQ		PPC_BIT(6)
 #define I2C_STAT_CMD_COMP		PPC_BIT(7)
 #define I2C_STAT_STOP_ERR		PPC_BIT(8)
-#define I2C_STAT_UPPER_THRS_MASK	PPC_BITMASK(9, 15)
-#define I2C_STAT_UPPER_THRS_LSH		PPC_BITLSHIFT(15)
+#define I2C_STAT_UPPER_THRS		PPC_BITMASK(9, 15)
 #define I2C_STAT_ANY_I2C_INTR		PPC_BIT(16)
 #define I2C_STAT_PORT_HISTORY_BUSY	PPC_BIT(19)
 #define I2C_STAT_SCL_INPUT_LEVEL	PPC_BIT(20)
 #define I2C_STAT_SDA_INPUT_LEVEL	PPC_BIT(21)
 #define I2C_STAT_PORT_BUSY		PPC_BIT(22)
 #define I2C_STAT_INTERFACE_BUSY         PPC_BIT(23)
-#define I2C_STAT_FIFO_ENTRY_COUNT_MASK  PPC_BITMASK(24, 31)
-#define I2C_STAT_FIFO_ENTRY_COUNT_LSH	PPC_BITLSHIFT(31)
+#define I2C_STAT_FIFO_ENTRY_COUNT	  PPC_BITMASK(24, 31)
 
 #define I2C_STAT_ANY_ERR (I2C_STAT_INVALID_CMD | I2C_STAT_LBUS_PARITY_ERR | \
 			  I2C_STAT_BKEND_OVERRUN_ERR | \
@@ -153,10 +143,8 @@ DEFINE_LOG_ENTRY(OPAL_RC_I2C_RESET, OPAL_INPUT_OUTPUT_ERR_EVT, OPAL_I2C,
 
 /* I2C extended status register */
 #define I2C_EXTD_STAT_REG		0xc
-#define I2C_EXTD_STAT_FIFO_SIZE_MASK	PPC_BITMASK(0, 7)
-#define I2C_EXTD_STAT_FIFO_SIZE_LSH	PPC_BITLSHIFT(7)
-#define I2C_EXTD_STAT_MSM_CURSTATE_MASK PPC_BITMASK(11, 15)
-#define I2C_EXTD_STAT_MSM_CURSTATE_LSH	PPC_BITLSHIFT(15)
+#define I2C_EXTD_STAT_FIFO_SIZE		PPC_BITMASK(0, 7)
+#define I2C_EXTD_STAT_MSM_CURSTATE	PPC_BITMASK(11, 15)
 #define I2C_EXTD_STAT_SCL_IN_SYNC	PPC_BIT(16)
 #define I2C_EXTD_STAT_SDA_IN_SYNC	PPC_BIT(17)
 #define I2C_EXTD_STAT_S_SCL		PPC_BIT(18)
@@ -167,15 +155,12 @@ DEFINE_LOG_ENTRY(OPAL_RC_I2C_RESET, OPAL_INPUT_OUTPUT_ERR_EVT, OPAL_I2C,
 #define I2C_EXTD_STAT_LOW_WATER		PPC_BIT(23)
 #define I2C_EXTD_STAT_I2C_BUSY		PPC_BIT(24)
 #define I2C_EXTD_STAT_SELF_BUSY		PPC_BIT(25)
-#define I2C_EXTD_STAT_I2C_VERSION_MASK	PPC_BITMASK(27, 31)
-#define I2C_EXTD_STAT_I2C_VERSION_LSH	PPC_BITLSHIFT(31)
+#define I2C_EXTD_STAT_I2C_VERSION	PPC_BITMASK(27, 31)
 
 /* I2C residual front end/back end length */
 #define I2C_RESIDUAL_LEN_REG		0xd
-#define I2C_RESIDUAL_FRONT_END_MASK	PPC_BITMASK(0, 15)
-#define I2C_RESIDUAL_FRONT_END_LSH	PPC_BITLSHIFT(15)
-#define I2C_RESIDUAL_BACK_END_MASK	PPC_BITMASK(16, 31)
-#define I2C_RESIDUAL_BACK_END_LSH	PPC_BITLSHIFT(31)
+#define I2C_RESIDUAL_FRONT_END		PPC_BITMASK(0, 15)
+#define I2C_RESIDUAL_BACK_END		PPC_BITMASK(16, 31)
 
 /* Port busy register */
 #define I2C_PORT_BUYS_REG		0xe