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| author | Haren Myneni <haren@linux.vnet.ibm.com> | 2017-07-17 19:47:39 -0700 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-08-01 12:39:43 +1000 |
| commit | b3623e67badbb7021900068e18b517dfd462009b (patch) | |
| tree | 27f40b259f5aebefa58d06da0836aa1689481948 /hw/nx-842.c | |
| parent | b0dce19d3e3d783fc5c96745fee16f6940918832 (diff) | |
| download | skiboot-b3623e67badbb7021900068e18b517dfd462009b.zip skiboot-b3623e67badbb7021900068e18b517dfd462009b.tar.gz skiboot-b3623e67badbb7021900068e18b517dfd462009b.tar.bz2 | |
NX: Organize NX compression code to include 842 and gzip support
P9 NX also supports gzip compression. So this patch creates
nx-compress.c and reorg nx-842.c code so that common functions that are
needed for both 842 and gzip compression will be moved in to
nx-compress.c. This patch does not change the actual functionality.
Signed-off-by: Haren Myneni <hmyneni@us.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/nx-842.c')
| -rw-r--r-- | hw/nx-842.c | 26 |
1 files changed, 7 insertions, 19 deletions
diff --git a/hw/nx-842.c b/hw/nx-842.c index f462f7a..031de03 100644 --- a/hw/nx-842.c +++ b/hw/nx-842.c @@ -24,11 +24,6 @@ /* Configuration settings */ #define CFG_842_FC_ENABLE (0x1f) /* enable all 842 functions */ #define CFG_842_ENABLE (1) /* enable 842 engines */ -#define DMA_COMPRESS_PREFETCH (1) /* enable prefetching (on P8) */ -#define DMA_DECOMPRESS_PREFETCH (1) /* enable prefetching (on P8) */ -#define DMA_COMPRESS_MAX_RR (15) /* range 1-15 */ -#define DMA_DECOMPRESS_MAX_RR (15) /* range 1-15 */ -#define DMA_SPBC (1) /* write SPBC in CPB */ #define DMA_CSB_WR NX_DMA_CSB_WR_CI #define DMA_COMPLETION_MODE NX_DMA_COMPLETION_MODE_CI #define DMA_CPB_WR NX_DMA_CPB_WR_CI_PAD @@ -90,7 +85,7 @@ static int nx_cfg_842(u32 gcid, u64 xcfg) return rc; } -static int nx_cfg_dma(u32 gcid, u64 xcfg) +static int nx_cfg_842_dma(u32 gcid, u64 xcfg) { u64 cfg; int rc; @@ -100,9 +95,9 @@ static int nx_cfg_dma(u32 gcid, u64 xcfg) return rc; if (proc_gen == proc_gen_p8) { - cfg = SETFIELD(NX_P8_DMA_CFG_842_COMPRESS_PREFETCH, cfg, + cfg = SETFIELD(NX_DMA_CFG_842_COMPRESS_PREFETCH, cfg, DMA_COMPRESS_PREFETCH); - cfg = SETFIELD(NX_P8_DMA_CFG_842_DECOMPRESS_PREFETCH, cfg, + cfg = SETFIELD(NX_DMA_CFG_842_DECOMPRESS_PREFETCH, cfg, DMA_DECOMPRESS_PREFETCH); } @@ -131,7 +126,7 @@ static int nx_cfg_dma(u32 gcid, u64 xcfg) return rc; } -static int nx_cfg_ee(u32 gcid, u64 xcfg) +static int nx_cfg_842_ee(u32 gcid, u64 xcfg) { u64 cfg; int rc; @@ -153,18 +148,11 @@ static int nx_cfg_ee(u32 gcid, u64 xcfg) return rc; } -void nx_create_842_node(struct dt_node *node) +void nx_enable_842(struct dt_node *node, u32 gcid, u32 pb_base) { - u32 gcid; - u32 pb_base; u64 cfg_dma, cfg_842, cfg_ee; int rc; - gcid = dt_get_chip_id(node); - pb_base = dt_get_address(node, 0, NULL); - - prlog(PR_INFO, "NX%d: 842 at 0x%x\n", gcid, pb_base); - if (dt_node_is_compatible(node, "ibm,power7-nx")) { cfg_dma = pb_base + NX_P7_DMA_CFG; cfg_842 = pb_base + NX_P7_842_CFG; @@ -178,7 +166,7 @@ void nx_create_842_node(struct dt_node *node) return; } - rc = nx_cfg_dma(gcid, cfg_dma); + rc = nx_cfg_842_dma(gcid, cfg_dma); if (rc) return; @@ -186,7 +174,7 @@ void nx_create_842_node(struct dt_node *node) if (rc) return; - rc = nx_cfg_ee(gcid, cfg_ee); + rc = nx_cfg_842_ee(gcid, cfg_ee); if (rc) return; |