diff options
| author | Reza Arbab <arbab@linux.vnet.ibm.com> | 2017-08-09 13:29:37 -0500 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-09-12 22:52:08 -0500 |
| commit | 6bfa7b56b738de273ddb17434f5d57d555592da9 (patch) | |
| tree | 369b719f07263267f76eeab94227a0c2e7ef1f30 /hw/npu2.c | |
| parent | f5c55f30f6a1120cb73b6089b60a64e595ee197c (diff) | |
| download | skiboot-6bfa7b56b738de273ddb17434f5d57d555592da9.zip skiboot-6bfa7b56b738de273ddb17434f5d57d555592da9.tar.gz skiboot-6bfa7b56b738de273ddb17434f5d57d555592da9.tar.bz2 | |
npu2: Implement FLR
Add basic handling of FLR (function level reset) by porting the changes
from commit b74841db759d ("npu: Implement FLR") to npu2.
The only difference for npu2 is that we track the reset state explicitly
with a link flag instead of inferring it from
dev->procedure_{status,number,step,data}.
Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/npu2.c')
| -rw-r--r-- | hw/npu2.c | 29 |
1 files changed, 28 insertions, 1 deletions
@@ -405,6 +405,29 @@ static int64_t npu2_dev_cfg_bar(void *dev, struct pci_cfg_reg_filter *pcrf, return npu2_cfg_read_bar(ndev, pcrf, offset, len, data); } +static int64_t npu2_dev_cfg_exp_devcap(void *dev, + struct pci_cfg_reg_filter *pcrf __unused, + uint32_t offset, uint32_t size, + uint32_t *data, bool write) +{ + struct pci_virt_device *pvd = dev; + struct npu2_dev *ndev = pvd->data; + + assert(write); + + if ((size != 2) || (offset & 1)) { + /* Short config writes are not supported */ + prlog(PR_ERR, "NPU%d: Unsupported write to pcie control register\n", + ndev->phb->opal_id); + return OPAL_PARAMETER; + } + + if (*data & PCICAP_EXP_DEVCTL_FUNC_RESET) + npu2_dev_procedure_reset(ndev); + + return OPAL_PARTIAL; +} + #define NPU2_CFG_READ(size, type) \ static int64_t npu2_cfg_read##size(struct phb *phb, uint32_t bdfn, \ uint32_t offset, type *data) \ @@ -1344,7 +1367,7 @@ static uint32_t npu2_populate_pcie_cap(struct npu2_dev *dev, /* 0x04 - Device capability * - * We should support FLR. Oterwhsie, it might have + * We should support FLR. Otherwise, it might have * problem passing it through to userland via Linux * VFIO infrastructure */ @@ -1355,6 +1378,10 @@ static uint32_t npu2_populate_pcie_cap(struct npu2_dev *dev, (PCICAP_EXP_DEVCAP_FUNC_RESET)); PCI_VIRT_CFG_INIT_RO(pvd, start + PCICAP_EXP_DEVCAP, 4, val); + pci_virt_add_filter(pvd, start + PCICAP_EXP_DEVCTL, 2, + PCI_REG_FLAG_WRITE, + npu2_dev_cfg_exp_devcap, NULL); + /* 0x08 - Device control and status */ PCI_VIRT_CFG_INIT(pvd, start + PCICAP_EXP_DEVCTL, 4, 0x00002810, 0xffff0000, 0x000f0000); |