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| author | Nicholas Piggin <npiggin@gmail.com> | 2019-12-08 22:23:09 +1000 |
|---|---|---|
| committer | Oliver O'Halloran <oohall@gmail.com> | 2019-12-16 14:50:56 +1100 |
| commit | a0cf95fea1f6681f866e4cb449bde56bf729819e (patch) | |
| tree | 2e9f8b62c6014568ea5bdf72ecfc09e137f91d7c /hdata | |
| parent | 35776a29f24ec4e3b8cd19cfc87dd05f9c646cdc (diff) | |
| download | skiboot-a0cf95fea1f6681f866e4cb449bde56bf729819e.zip skiboot-a0cf95fea1f6681f866e4cb449bde56bf729819e.tar.gz skiboot-a0cf95fea1f6681f866e4cb449bde56bf729819e.tar.bz2 | |
dt: assorted cleanups
This replaces several instances dt accesses with higher level
primitives throughout the tree.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hdata')
| -rw-r--r-- | hdata/iohub.c | 21 | ||||
| -rw-r--r-- | hdata/memory.c | 7 |
2 files changed, 9 insertions, 19 deletions
diff --git a/hdata/iohub.c b/hdata/iohub.c index 6647e6a..35f4a74 100644 --- a/hdata/iohub.c +++ b/hdata/iohub.c @@ -95,7 +95,6 @@ static struct dt_node *io_add_phb3(const struct cechub_io_hub *hub, unsigned int spci_xscom) { struct dt_node *pbcq; - uint32_t reg[6]; unsigned int hdif_vers; /* Get HDIF version */ @@ -109,13 +108,10 @@ static struct dt_node *io_add_phb3(const struct cechub_io_hub *hub, /* "reg" property contains in order the PE, PCI and SPCI XSCOM * addresses */ - reg[0] = cpu_to_be32(pe_xscom); - reg[1] = cpu_to_be32(0x20); - reg[2] = cpu_to_be32(pci_xscom); - reg[3] = cpu_to_be32(0x05); - reg[4] = cpu_to_be32(spci_xscom); - reg[5] = cpu_to_be32(0x15); - dt_add_property(pbcq, "reg", reg, sizeof(reg)); + dt_add_property_cells(pbcq, "reg", + pe_xscom, 0x20, + pci_xscom, 0x05, + spci_xscom, 0x15); /* A couple more things ... */ dt_add_property_strings(pbcq, "compatible", "ibm,power8-pbcq"); @@ -202,7 +198,6 @@ static struct dt_node *io_add_phb4(const struct cechub_io_hub *hub, int phb_base) { struct dt_node *pbcq; - uint32_t reg[4]; uint8_t active_phb_mask = hub->fab_br0_pdt; uint32_t pe_xscom = 0x4010c00 + (pec_index * 0x0000400); uint32_t pci_xscom = 0xd010800 + (pec_index * 0x1000000); @@ -214,11 +209,9 @@ static struct dt_node *io_add_phb4(const struct cechub_io_hub *hub, return NULL; /* "reg" property contains (in order) the PE and PCI XSCOM addresses */ - reg[0] = cpu_to_be32(pe_xscom); - reg[1] = cpu_to_be32(0x100); - reg[2] = cpu_to_be32(pci_xscom); - reg[3] = cpu_to_be32(0x200); - dt_add_property(pbcq, "reg", reg, sizeof(reg)); + dt_add_property_cells(pbcq, "reg", + pe_xscom, 0x100, + pci_xscom, 0x200); /* The hubs themselves go under the stacks */ dt_add_property_strings(pbcq, "compatible", "ibm,power9-pbcq"); diff --git a/hdata/memory.c b/hdata/memory.c index 9e5e99b..7839dea 100644 --- a/hdata/memory.c +++ b/hdata/memory.c @@ -77,24 +77,21 @@ static void append_chip_id(struct dt_node *mem, u32 id) { struct dt_property *prop; size_t len, i; - be32 *p; prop = __dt_find_property(mem, "ibm,chip-id"); if (!prop) return; len = prop->len >> 2; - p = (be32*)prop->prop; /* Check if it exists already */ for (i = 0; i < len; i++) { - if (be32_to_cpu(p[i]) == id) + if (dt_property_get_cell(prop, i) == id) return; } /* Add it to the list */ dt_resize_property(&prop, (len + 1) << 2); - p = (be32 *)prop->prop; - p[len] = cpu_to_be32(id); + dt_property_set_cell(prop, len, id); } static void update_status(struct dt_node *mem, uint32_t status) |