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| author | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-08-04 12:50:52 +0530 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-08-06 12:20:41 +0530 |
| commit | d7ffcd939d971bdffc9e50bf7886345c9536d68c (patch) | |
| tree | 44d6962df04920716926584bd093dda26e882466 /hdata/test | |
| parent | c8c36ada1d9a07be1120663ab02dc87798362cb8 (diff) | |
| download | skiboot-d7ffcd939d971bdffc9e50bf7886345c9536d68c.zip skiboot-d7ffcd939d971bdffc9e50bf7886345c9536d68c.tar.gz skiboot-d7ffcd939d971bdffc9e50bf7886345c9536d68c.tar.bz2 | |
hdata: Add POWER10 support
Initial P10 support
- LPC : This contains two useful information:
LPC MCTP Memory Window Base Address
Second vUART console details
- Enable memory-buffer mmio
- Fix ipmi sensors
IPMI sensors are deprecated in P10. Hence do not parse ipmi sensors.
- I2C support
- Detect PHB5
- Create p10 xscom, xive, chiptod nodes
- Set pa-features bit for 2nd DAWR
Availability of 2nd DAWR depends on 0th bit of 64th byte of
ibm,pa-features property. Set it for p10.
Co-authored-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Co-authored-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Co-authored-by: Reza Arbab <arbab@linux.ibm.com>
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Co-authored-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'hdata/test')
| -rw-r--r-- | hdata/test/hdata_to_dt.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/hdata/test/hdata_to_dt.c b/hdata/test/hdata_to_dt.c index 90d83f9..1729f1c 100644 --- a/hdata/test/hdata_to_dt.c +++ b/hdata/test/hdata_to_dt.c @@ -2,7 +2,7 @@ /* * Given a hdata dump, output the device tree. * - * Copyright 2013-2019 IBM Corp. + * Copyright 2013-2020 IBM Corp. */ #include <sys/types.h> @@ -63,11 +63,13 @@ unsigned long tb_hz = 512000000; #define PVR_TYPE_P8NVL 0x004c #define PVR_TYPE_P9 0x004e #define PVR_TYPE_P9P 0x004f +#define PVR_TYPE_P10 0x0080 #define PVR_P8E 0x004b0201 #define PVR_P8 0x004d0200 #define PVR_P8NVL 0x004c0100 #define PVR_P9 0x004e0200 #define PVR_P9P 0x004f0100 +#define PVR_P10 0x00800100 #define SPR_PVR 0x11f /* RO: Processor version register */ @@ -328,6 +330,10 @@ int main(int argc, char *argv[]) fake_pvr = PVR_P9P; proc_gen = proc_gen_p9; opt_count++; + } else if (strcmp(argv[i], "-10") == 0) { + fake_pvr = PVR_P10; + proc_gen = proc_gen_p10; + opt_count++; } } @@ -347,13 +353,17 @@ int main(int argc, char *argv[]) " -8 Force PVR to POWER8\n" " -8E Force PVR to POWER8E\n" " -9 Force PVR to POWER9 (nimbus)\n" + " -9P Force PVR to POWER9P (Axone)\n" + " -10 Force PVR to POWER10\n" "\n" "When no PVR is specified -8 is assumed" "\n" "Pipe to 'dtc -I dtb -O dts' for human readable output\n"); } - phys_map_init(fake_pvr); + /* We don't have phys mapping for P8 */ + if (proc_gen != proc_gen_p8) + phys_map_init(fake_pvr); /* Copy in spira dump (assumes little has changed!). */ if (new_spira) { |