diff options
| author | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-08-04 12:50:52 +0530 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-08-06 12:20:41 +0530 |
| commit | d7ffcd939d971bdffc9e50bf7886345c9536d68c (patch) | |
| tree | 44d6962df04920716926584bd093dda26e882466 /hdata/spira.h | |
| parent | c8c36ada1d9a07be1120663ab02dc87798362cb8 (diff) | |
| download | skiboot-d7ffcd939d971bdffc9e50bf7886345c9536d68c.zip skiboot-d7ffcd939d971bdffc9e50bf7886345c9536d68c.tar.gz skiboot-d7ffcd939d971bdffc9e50bf7886345c9536d68c.tar.bz2 | |
hdata: Add POWER10 support
Initial P10 support
- LPC : This contains two useful information:
LPC MCTP Memory Window Base Address
Second vUART console details
- Enable memory-buffer mmio
- Fix ipmi sensors
IPMI sensors are deprecated in P10. Hence do not parse ipmi sensors.
- I2C support
- Detect PHB5
- Create p10 xscom, xive, chiptod nodes
- Set pa-features bit for 2nd DAWR
Availability of 2nd DAWR depends on 0th bit of 64th byte of
ibm,pa-features property. Set it for p10.
Co-authored-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Co-authored-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Co-authored-by: Reza Arbab <arbab@linux.ibm.com>
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Co-authored-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'hdata/spira.h')
| -rw-r--r-- | hdata/spira.h | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/hdata/spira.h b/hdata/spira.h index 18d73bd..7c5341f 100644 --- a/hdata/spira.h +++ b/hdata/spira.h @@ -304,7 +304,7 @@ struct spss_iopath { __be32 firmware_bar; __be32 internal_bar; - __be32 reserved2; + __be32 mctp_base; __be64 uart_base; __be32 uart_size; @@ -316,13 +316,27 @@ struct spss_iopath { #define UART_INT_LVL_LOW 0x1 #define UART_INT_RISING 0x2 #define UART_INT_LVL_HIGH 0x3 - uint8_t reserved3[2]; + uint8_t uart_valid; + uint8_t reserved3; __be64 bt_base; __be32 bt_size; uint8_t bt_sms_int_num; uint8_t bt_bmc_response_int_num; uint8_t reserved4[2]; + + __be16 kcs_data_reg_addr; + __be16 kcs_status_reg_addr; + uint8_t kcs_int_number; + + __be64 uart2_base; + __be32 uart2_size; + __be32 uart2_clk; /* UART baud clock in Hz */ + __be32 uart2_baud; /* UART baud rate */ + uint8_t uart2_int_number; + uint8_t uart2_int_type; + uint8_t uart2_valid; + uint8_t reserved5; } __packed lpc; }; } __packed; @@ -493,6 +507,7 @@ struct msvpd_ms_addr_config { __be64 max_possible_ms_address; __be32 deprecated; __be64 mirrorable_memory_starting_address; + __be64 hrmor_stash_loc_address; } __packed; /* Idata index 1: Total configured mainstore */ @@ -651,6 +666,7 @@ struct cechub_io_hub { #define CECHUB_HUB_NIMBUS_LAGRANGE 0x0022 /* Nimbus+lagrange from spec */ #define CECHUB_HUB_CUMULUS_DUOMO 0x0030 /* cumulus+duomo from spec */ #define CECHUB_HUB_AXONE_HOPPER 0x0040 /* axone+hopper */ +#define CECHUB_HUB_RAINIER 0x0050 __be32 ec_level; __be32 aff_dom2; /* HDAT < v9.x only */ __be32 aff_dom3; /* HDAT < v9.x only */ |