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| author | Cédric Le Goater <clg@kaod.org> | 2021-08-07 09:38:21 +0200 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-08-18 16:35:39 +0530 |
| commit | cd12ea6d8e1f384ef22c50777cb06b059fc3734c (patch) | |
| tree | 7013b0b80d6db6cbf28cb233707484b462801240 /core | |
| parent | 3edfdb57712876300eab7f570356aec11b4bddca (diff) | |
| download | skiboot-cd12ea6d8e1f384ef22c50777cb06b059fc3734c.zip skiboot-cd12ea6d8e1f384ef22c50777cb06b059fc3734c.tar.gz skiboot-cd12ea6d8e1f384ef22c50777cb06b059fc3734c.tar.bz2 | |
interrupts: Do not advertise XICS support on P10
We only support the XIVE interface.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'core')
| -rw-r--r-- | core/interrupts.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/core/interrupts.c b/core/interrupts.c index 0a617d3..5d2d04d 100644 --- a/core/interrupts.c +++ b/core/interrupts.c @@ -18,6 +18,7 @@ #include <timer.h> #include <sbe-p8.h> #include <sbe-p9.h> +#include <xive.h> /* ICP registers */ #define ICP_XIRR 0x4 /* 32-bit access */ @@ -157,9 +158,14 @@ uint32_t get_psi_interrupt(uint32_t chip_id) struct dt_node *add_ics_node(void) { - struct dt_node *ics = dt_new_addr(dt_root, "interrupt-controller", 0); + struct dt_node *ics; bool has_xive; + bool has_xive_only = proc_gen >= proc_gen_p10; + if (has_xive_only) + return NULL; + + ics = dt_new_addr(dt_root, "interrupt-controller", 0); if (!ics) return NULL; @@ -181,6 +187,10 @@ struct dt_node *add_ics_node(void) uint32_t get_ics_phandle(void) { struct dt_node *i; + bool has_xive_only = proc_gen >= proc_gen_p10; + + if (has_xive_only) + return xive2_get_phandle(); for (i = dt_first(dt_root); i; i = dt_next(dt_root, i)) { if (streq(i->name, "interrupt-controller@0")) { |