pau: introduce support

OpenCapi for P10 is included in the P10 chip. This requires OCAPI capable
PHYs, Datalink Layer Logic and Transaction Layer Logic to be included.
The PHYs are the physical connection to the OCAPI interconnect.
The Datalink Layer provides link training.
The Transaction Layer executes the cache coherent and data movement
commands on the P10 chip.
The PAU provides the Transaction Layer functionality for the OCAPI
link(s) on the P10 chip.

The P10 PAU supports two OCAPI links. Six accelerator units PAUs are
instantiated on the P10 chip for a total of twelve OCAPI links.

This patch adds PAU opencapi structure for supporting OpenCapi5.
hw/pau.c file contains main of PAU management functions.

Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>

1 files changed, 3 insertions, 0 deletions

diff --git a/core/init.c b/core/init.c
index 0247a0a..aab0e90 100644
--- a/core/init.c
+++ b/core/init.c
@@ -1371,6 +1371,9 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt)
 	probe_npu();
 	probe_npu2();
 
+	/* Probe PAUs */
+	probe_pau();
+
 	/* Initialize PCI */
 	pci_init_slots();