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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-07-07 16:08:40 -0500 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-07-11 14:27:57 +1000 |
commit | 537b7a705df795d888852b2cb4fbe535b4d534f4 (patch) | |
tree | 37bf9bae2ba76284cd1a51adbb53c7ef1e74f219 /core | |
parent | bda5e0ea20180f4f8d40f75511256df0e5959ed3 (diff) | |
download | skiboot-537b7a705df795d888852b2cb4fbe535b4d534f4.zip skiboot-537b7a705df795d888852b2cb4fbe535b4d534f4.tar.gz skiboot-537b7a705df795d888852b2cb4fbe535b4d534f4.tar.bz2 |
cpu: Unconditionally cleanup TLBs on P9 in opal_reinit_cpus()
This can work around problems where Linux fails to properly
cleanup part or all of the TLB on kexec.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core')
-rw-r--r-- | core/cpu.c | 13 |
1 files changed, 11 insertions, 2 deletions
@@ -1191,12 +1191,21 @@ static int64_t opal_reinit_cpus(uint64_t flags) else req.clr_bits |= SPR_HID0_POWER9_RADIX; - cleanup_global_tlb(); current_radix_mode = radix; } } - /* Apply HID bits changes if any */ + /* Cleanup the TLB. We do that unconditionally, this works + * around issues where OSes fail to invalidate the PWC in Radix + * mode for example. This only works on P9 and later, but we + * also know we don't have a problem with Linux cleanups on + * P8 so this isn't a problem. If we wanted to cleanup the + * TLB on P8 as well, we'd have to use jobs to do it locally + * on each CPU. + */ + cleanup_global_tlb(); + + /* Apply HID bits changes if any */ if (req.set_bits || req.clr_bits) cpu_change_all_hid0(&req); |