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authorGavin Shan <gwshan@linux.vnet.ibm.com>2017-03-10 11:25:45 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-03-31 16:57:06 +1100
commit07f17c3c7db3df48f9f681edf8453312837e6119 (patch)
treeebd35516610fce901248db09ff4933347696ce15 /core
parent03f97028944815348ffd9c1ab1f895f763caa317 (diff)
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core/pci: Ignore PCI slot capability on root port
We are creating PCI slot on root port, where the PCI slot isn't supported from hardware. For this case, we shouldn't read the PCI slot capability from hardware. When bogus data returned from the hardware, we will attempt to the PCI slot's power state or enable surprise hotplug functionality. All of them can't be accomplished without hardware support. This leaves the PCI slot's capability list 0 if PCICAP_EXP_CAP_SLOT isn't set in hardware (pcie_cap + 0x2). Otherwise, the PCI slot's capability list is retrieved from hardware (pcie_cap + 0x14). Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core')
-rw-r--r--core/pcie-slot.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/core/pcie-slot.c b/core/pcie-slot.c
index 64f0da6..aca59dd 100644
--- a/core/pcie-slot.c
+++ b/core/pcie-slot.c
@@ -461,8 +461,13 @@ struct pci_slot *pcie_slot_create(struct phb *phb, struct pci_device *pd)
&slot->pcie_cap);
pci_cfg_read32(phb, pd->bdfn, ecap + PCICAP_EXP_LCAP,
&slot->link_cap);
- pci_cfg_read32(phb, pd->bdfn, ecap + PCICAP_EXP_SLOTCAP,
- &slot->slot_cap);
+
+ /* Leave PCI slot capability blank if PCI slot isn't supported */
+ if (slot->pcie_cap & PCICAP_EXP_CAP_SLOT)
+ pci_cfg_read32(phb, pd->bdfn, ecap + PCICAP_EXP_SLOTCAP,
+ &slot->slot_cap);
+ else
+ slot->slot_cap = 0;
if (slot->slot_cap & PCICAP_EXP_SLOTCAP_HPLUG_CAP)
slot->pluggable = 1;