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authorGavin Shan <gwshan@linux.vnet.ibm.com>2017-02-20 10:57:49 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-02-22 16:51:18 +1100
commitaa295110d9487d2b4b3ff31b6369bf59e1cba824 (patch)
tree06fa1db7c8bc09637ddf0bbddf5ffe0a8b4f80a1 /core/pcie-slot.c
parent73420cce2c6964a6db8e46962c876163a9caa371 (diff)
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core/pci: No validation on pd and ecap in pcie_slot_create()
The PCI device and its PCIe capability offset should be valid in pcie_slot_create(). No need to validate them. This removes the validation logic to make the function simpler. No functional changes introduced. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core/pcie-slot.c')
-rw-r--r--core/pcie-slot.c26
1 files changed, 11 insertions, 15 deletions
diff --git a/core/pcie-slot.c b/core/pcie-slot.c
index de2d5a5..72068ba 100644
--- a/core/pcie-slot.c
+++ b/core/pcie-slot.c
@@ -449,15 +449,13 @@ struct pci_slot *pcie_slot_create(struct phb *phb, struct pci_device *pd)
return NULL;
/* Cache the link and slot capabilities */
- if (pd) {
- ecap = pci_cap(pd, PCI_CFG_CAP_ID_EXP, false);
- pci_cfg_read16(phb, pd->bdfn, ecap + PCICAP_EXP_CAPABILITY_REG,
- &slot->pcie_cap);
- pci_cfg_read32(phb, pd->bdfn, ecap + PCICAP_EXP_LCAP,
- &slot->link_cap);
- pci_cfg_read32(phb, pd->bdfn, ecap + PCICAP_EXP_SLOTCAP,
- &slot->slot_cap);
- }
+ ecap = pci_cap(pd, PCI_CFG_CAP_ID_EXP, false);
+ pci_cfg_read16(phb, pd->bdfn, ecap + PCICAP_EXP_CAPABILITY_REG,
+ &slot->pcie_cap);
+ pci_cfg_read32(phb, pd->bdfn, ecap + PCICAP_EXP_LCAP,
+ &slot->link_cap);
+ pci_cfg_read32(phb, pd->bdfn, ecap + PCICAP_EXP_SLOTCAP,
+ &slot->slot_cap);
if (slot->slot_cap & PCICAP_EXP_SLOTCAP_HPLUG_CAP)
slot->pluggable = 1;
@@ -467,12 +465,10 @@ struct pci_slot *pcie_slot_create(struct phb *phb, struct pci_device *pd)
/* The power is on by default */
slot->power_state = PCI_SLOT_POWER_ON;
- if (pd && ecap) {
- pci_cfg_read16(phb, pd->bdfn,
- ecap + PCICAP_EXP_SLOTCTL, &slot_ctl);
- if (((slot_ctl & PCICAP_EXP_SLOTCTL_PWRI) >> 8) == PCIE_INDIC_OFF)
- slot->power_state = PCI_SLOT_POWER_OFF;
- }
+ pci_cfg_read16(phb, pd->bdfn, ecap + PCICAP_EXP_SLOTCTL,
+ &slot_ctl);
+ if (((slot_ctl & PCICAP_EXP_SLOTCTL_PWRI) >> 8) == PCIE_INDIC_OFF)
+ slot->power_state = PCI_SLOT_POWER_OFF;
}
if (slot->slot_cap & PCICAP_EXP_SLOTCAP_PWRI)