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author | Alistair Popple <alistair@popple.id.au> | 2015-04-09 13:47:12 +1000 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-05-07 17:51:29 +1000 |
commit | 9e5747525d909fbf71a68d3593bba06d2bc4e86c (patch) | |
tree | 2df9cfe91dcd91c25bdbc4457fbb0ebdf9a8270a /core/pci.c | |
parent | c04f054808ce744526494253d3fa03330d53dcfb (diff) | |
download | skiboot-9e5747525d909fbf71a68d3593bba06d2bc4e86c.zip skiboot-9e5747525d909fbf71a68d3593bba06d2bc4e86c.tar.gz skiboot-9e5747525d909fbf71a68d3593bba06d2bc4e86c.tar.bz2 |
eeh: Fix eeh event handling
The opal eeh interrupt handlers raise an opal event
(OPAL_EVENT_PCI_ERROR) whenever there is some processing required from
the OS. The OS then needs to call opal_pci_next_error(...) in a loop
passing each phb in turn to clear the event.
However opal_pci_next_error(...) clears the event unconditionally
meaning it would be possible for eeh events to be cleared without
processing them leading to missed events.
This patch fixes the problem by keeping track of eeh events on a
per-phb basis and only clearing the opal event once all phb eeh events
have been cleared.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core/pci.c')
-rw-r--r-- | core/pci.c | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -21,6 +21,8 @@ #include <timebase.h> #include <device.h> +/* The eeh event code will need updating if this is ever increased to + * support more than 64 phbs */ static struct phb *phbs[64]; #define PCITRACE(_p, _bdfn, fmt, a...) \ |