core/pci: Initialize AER capability in PCI core

Currently, AER capability is initialized in phb_ops->device_init()
which is called after the device is instantiated by PCI core, or
reinitializing the device after reset in EEH recovery path. It
means we are maintaining similar sets of codes for P7IOC, PHB3
and PHB4.

This moves the logic initializing AER capability from P7IOC, PHB3
and PHB4 to PCI core, thus the duplicated codes can be dropped.
No functional changes introduced by this.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 13 insertions, 0 deletions

diff --git a/core/pci.c b/core/pci.c
index 5f6e259..f227f69 100644
--- a/core/pci.c
+++ b/core/pci.c
@@ -188,9 +188,22 @@ static void pci_init_pcie_cap(struct phb *phb, struct pci_device *pd)
 		pd->mps = 4096;
 }
 
+static void pci_init_aer_cap(struct phb *phb, struct pci_device *pd)
+{
+	int64_t pos;
+
+	if (!pci_has_cap(pd, PCI_CFG_CAP_ID_EXP, false))
+		return;
+
+	pos = pci_find_ecap(phb, pd->bdfn, PCIECAP_ID_AER, NULL);
+	if (pos > 0)
+		pci_set_cap(pd, PCIECAP_ID_AER, pos, true);
+}
+
 void pci_init_capabilities(struct phb *phb, struct pci_device *pd)
 {
 	pci_init_pcie_cap(phb, pd);
+	pci_init_aer_cap(phb, pd);
 }
 
 static struct pci_device *pci_scan_one(struct phb *phb, struct pci_device *parent,