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author | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2019-07-12 16:48:00 +0530 |
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committer | Oliver O'Halloran <oohall@gmail.com> | 2019-08-15 17:54:24 +1000 |
commit | fa5cb0067d06a30db01f2c34df917d39df822d86 (patch) | |
tree | 6f5a7244d4c6906a54ede3d148cd58517b6a2a74 /core/opal-dump.c | |
parent | 7fa3c1ec5c3694dac8d690efe6463f68dd3421f3 (diff) | |
download | skiboot-fa5cb0067d06a30db01f2c34df917d39df822d86.zip skiboot-fa5cb0067d06a30db01f2c34df917d39df822d86.tar.gz skiboot-fa5cb0067d06a30db01f2c34df917d39df822d86.tar.bz2 |
MPIPL: Reserve memory to capture architected registers data
- Split SPIRAH memory to accommodate architected register ntuple.
Today we have 1K memory for SPIRAH and it uses 288 bytes. Lets split
this into two parts :
SPIRAH (756 bytes)
architected register memory (256 bytes)
- Update SPIRAH architected register ntuple
- Calculate memory required to capture architected registers data
Ideally we should use HDAT provided data (proc_dump_area->thread_size).
But we are not getting this data during boot. Hence lets reserve fixed
memory for architected registers data collection.
- Add architected registers destination memory to reserve-memory DT node.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
[oliver: rebased]
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'core/opal-dump.c')
-rw-r--r-- | core/opal-dump.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/core/opal-dump.c b/core/opal-dump.c index 6aefefd..fb8ff9f 100644 --- a/core/opal-dump.c +++ b/core/opal-dump.c @@ -16,6 +16,7 @@ #define pr_fmt(fmt) "DUMP: " fmt +#include <chip.h> #include <cpu.h> #include <device.h> #include <mem-map.h> @@ -31,9 +32,16 @@ #include "hdata/spira.h" +/* XXX Ideally we should use HDAT provided data (proc_dump_area->thread_size). + * But we are not getting this data durig boot. Hence lets reserve fixed + * memory for architected registers data collection. + */ +#define ARCH_REGS_DATA_SIZE_PER_CHIP (512 * 1024) + /* Actual address of MDST and MDDT table */ #define MDST_TABLE_BASE (SKIBOOT_BASE + MDST_TABLE_OFF) #define MDDT_TABLE_BASE (SKIBOOT_BASE + MDDT_TABLE_OFF) +#define PROC_DUMP_AREA_BASE (SKIBOOT_BASE + PROC_DUMP_AREA_OFF) static struct spira_ntuple *ntuple_mdst; static struct spira_ntuple *ntuple_mddt; @@ -214,6 +222,8 @@ static int opal_mpipl_remove_entry_mddt(bool remove_all, u8 region, u64 dest) static void opal_mpipl_register(void) { u64 opal_dest, opal_size; + u64 arch_regs_dest, arch_regs_size; + struct proc_dump_area *proc_dump = (void *)(PROC_DUMP_AREA_BASE); /* Get OPAL runtime size */ if (!dt_find_property(opal_node, "opal-runtime-size")) { @@ -233,6 +243,24 @@ static void opal_mpipl_register(void) /* Add OPAL reservation detail to MDST/MDDT table */ opal_mpipl_add_entry(DUMP_REGION_OPAL_MEMORY, SKIBOOT_BASE, opal_dest, opal_size); + + /* Thread size check */ + if (proc_dump->thread_size != 0) { + prlog(PR_INFO, "Thread register entry size is available, " + "but not supported.\n"); + } + + /* Calculate memory to capture CPU register data */ + arch_regs_dest = opal_dest + opal_size; + arch_regs_size = nr_chips() * ARCH_REGS_DATA_SIZE_PER_CHIP; + + /* Reserve memory used to capture architected register state */ + mem_reserve_fw("ibm,firmware-arch-registers", + arch_regs_dest, arch_regs_size); + proc_dump->alloc_addr = arch_regs_dest | HRMOR_BIT; + proc_dump->alloc_size = arch_regs_size; + prlog(PR_NOTICE, "Architected register dest addr : 0x%llx, " + "size : 0x%llx\n", arch_regs_dest, arch_regs_size); } static int payload_mpipl_register(u64 src, u64 dest, u64 size) |