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| author | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2019-07-12 16:47:43 +0530 |
|---|---|---|
| committer | Oliver O'Halloran <oohall@gmail.com> | 2019-08-15 17:52:38 +1000 |
| commit | bbe6e969662f8e26ef945f7aadc1c9543565196d (patch) | |
| tree | d289b2356b0d3364e9ccf26d7baa12e8b8099f0b | |
| parent | f10e629c9a76939d59574c5fabbe5b6ccd22812d (diff) | |
| download | skiboot-bbe6e969662f8e26ef945f7aadc1c9543565196d.zip skiboot-bbe6e969662f8e26ef945f7aadc1c9543565196d.tar.gz skiboot-bbe6e969662f8e26ef945f7aadc1c9543565196d.tar.bz2 | |
mem-map: Setup memory for MDRT table
Hostboot fills MDRT table after moving memory content from source to destination
memory. And OPAL relies on this table to extract the dump. We have to make sure
this table is intact. Hence define memory relative to SKIBOOT_BASE so that our
relocation doesn't overwrite this memory.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
[oliver: rebased]
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
| -rw-r--r-- | include/mem-map.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/include/mem-map.h b/include/mem-map.h index e75bd4e..ac3f432 100644 --- a/include/mem-map.h +++ b/include/mem-map.h @@ -89,11 +89,17 @@ #define PSI_TCE_TABLE_BASE (SKIBOOT_BASE + 0x01a00000) #define PSI_TCE_TABLE_SIZE_P8 0x00200000UL +/* This is our dump result table after MPIPL. Hostboot will write to this + * memory after moving memory content from source to destination memory. + */ +#define MDRT_TABLE_BASE (SKIBOOT_BASE + 0x01c00000) +#define MDRT_TABLE_SIZE 0x00010000 + /* Total size of the above area * * (Ensure this has at least a 64k alignment) */ -#define SKIBOOT_SIZE 0x01c00000 +#define SKIBOOT_SIZE 0x01c10000 /* We start laying out the CPU stacks from here, indexed by PIR * each stack is STACK_SIZE in size (naturally aligned power of |