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| author | Alistair Popple <alistair@popple.id.au> | 2018-07-18 10:43:59 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2018-07-17 22:49:27 -0500 |
| commit | b8702e2c69638f9cab818e76232af3481935e250 (patch) | |
| tree | 73bad0cc0f7411c99a2a1e0434ccf3ede37f89e8 | |
| parent | f651e8eb56e2c17aeac58fd50c20f874d874169c (diff) | |
| download | skiboot-b8702e2c69638f9cab818e76232af3481935e250.zip skiboot-b8702e2c69638f9cab818e76232af3481935e250.tar.gz skiboot-b8702e2c69638f9cab818e76232af3481935e250.tar.bz2 | |
Move pb_cen_hp_mode_curr register definition to xscom-p9-reg.h
Currently it is defined in npu2-regs.h but needs to be used by other files
as well so move it somewhere generic.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
| -rw-r--r-- | hw/npu2.c | 1 | ||||
| -rw-r--r-- | include/npu2-regs.h | 2 | ||||
| -rw-r--r-- | include/xscom-p9-regs.h | 4 |
3 files changed, 5 insertions, 2 deletions
@@ -37,6 +37,7 @@ #include <phys-map.h> #include <nvram.h> #include <xive.h> +#include <xscom-p9-regs.h> #define NPU2_IRQ_BASE_SHIFT 13 #define NPU2_N_DL_IRQS 23 diff --git a/include/npu2-regs.h b/include/npu2-regs.h index 7eb9d46..d797026 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -36,8 +36,6 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base, #define MCD_BANK_CN_VALID PPC_BIT(0) #define MCD_BANK_CN_SIZE PPC_BITMASK(13,29) #define MCD_BANK_CN_ADDR PPC_BITMASK(33,63) -#define PB_CENT_HP_MODE_CURR 0x5011c0c -#define PB_CFG_CHG_RATE_GP_MASTER PPC_BIT(2) #define PB_CENT_MODE 0x5011c0a #define PB_CFG_CHIP_ADDR_EXTENSION_MASK_CENT PPC_BITMASK(42,48) diff --git a/include/xscom-p9-regs.h b/include/xscom-p9-regs.h index c332249..42dd426 100644 --- a/include/xscom-p9-regs.h +++ b/include/xscom-p9-regs.h @@ -29,4 +29,8 @@ #define P9_SCOM_SPRD 0x20010A81 +#define PB_CENT_HP_MODE_CURR 0x5011c0c +#define PB_CFG_CHG_RATE_GP_MASTER PPC_BIT(2) +#define PB_CFG_PUMP_MODE PPC_BIT(54) + #endif /* __XSCOM_P9_REGS_H__ */ |