skiboot/skiboot.tcl: Add imc device nodes to skiboot.tcl

Add In-Memory Collection counter dummy nodes to the skiboot.tcl
to aid code testing in mambo for both OPAL and Kernel side enablement.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

2 files changed, 120 insertions, 2 deletions

diff --git a/external/mambo/skiboot.tcl b/external/mambo/skiboot.tcl
index 46d8569..ad10355 100644
--- a/external/mambo/skiboot.tcl
+++ b/external/mambo/skiboot.tcl
@@ -325,6 +325,88 @@ for { set c 0 } { $c < $mconf(cpus) } { incr c } {
     mysim of addprop $cpu_node array "ibm,ppc-interrupt-server#s" irqreg
 }
 
+#Add In-Memory Collection Counter nodes
+if { $default_config == "P9" } {
+   #Add the base node "imc-counters"
+   set imc_c [mysim of addchild $root_node "imc-counters" ""]
+   mysim of addprop $imc_c string "compatible" "ibm,opal-in-memory-counters"
+   mysim of addprop $imc_c int "#address-cells" 1
+   mysim of addprop $imc_c int "#size-cells" 1
+   mysim of addprop $imc_c int "version-id" 1
+
+      #Add a common mcs event node
+      set mcs_et [mysim of addchild $imc_c "nest-mcs-events" ""]
+      mysim of addprop $mcs_et int "#address-cells" 1
+      mysim of addprop $mcs_et int "#size-cells" 1
+
+         #Add a event
+         set et [mysim of addchild $mcs_et event [format %x 0]]
+         mysim of addprop  $et string "event-name" "64B_RD_OR_WR_DISP_PORT01"
+         mysim of addprop  $et string "unit" "MiB/s"
+         mysim of addprop  $et string "scale" "4"
+         mysim of addprop  $et int "reg" 0
+
+        #Add a event
+        set et [mysim of addchild $mcs_et event [format %x 1]]
+        mysim of addprop  $et string "event-name" "64B_WR_DISP_PORT01"
+        mysim of addprop  $et string "unit" "MiB/s"
+        mysim of addprop  $et int "reg" 40
+
+        #Add a event
+        set et [mysim of addchild $mcs_et event [format %x 2]]
+        mysim of addprop  $et string "event-name" "64B_RD_DISP_PORT01"
+        mysim of addprop  $et string "scale" "100"
+        mysim of addprop  $et int "reg" 64
+
+        #Add a event
+        set et [mysim of addchild $mcs_et event [format %x 3]]
+        mysim of addprop  $et string "event-name" "64B_XX_DISP_PORT01"
+        mysim of addprop  $et int "reg" 32
+
+     #Add a mcs device node
+     set mcs_01 [mysim of addchild $imc_c "mcs01" ""]
+     mysim of addprop $mcs_01 string "compatible" "ibm,imc-counters"
+     mysim of addprop  $mcs_01 string "events-prefix" "PM_MCS01_"
+     mysim of addprop  $mcs_01 int "reg" 65536
+     mysim of addprop  $mcs_01 int "size" 262144
+     mysim of addprop  $mcs_01 int "offset" 1572864
+     mysim of addprop  $mcs_01 int "events" $mcs_et
+     mysim of addprop  $mcs_01 int "type" 16
+     mysim of addprop $mcs_01 string "unit" "KiB/s"
+     mysim of addprop $mcs_01 string "scale" "8"
+
+      #Add a common core event node
+      set ct_et [mysim of addchild $imc_c "core-thread-events" ""]
+      mysim of addprop $ct_et int "#address-cells" 1
+      mysim of addprop $ct_et int "#size-cells" 1
+
+         #Add a event
+         set cet [mysim of addchild $ct_et event [format %x 200]]
+         mysim of addprop  $cet string "event-name" "0THRD_NON_IDLE_PCYC"
+         mysim of addprop  $cet string "desc" "The number of processor cycles when all threads are idle"
+         mysim of addprop  $cet int "reg" 200
+
+     #Add a core device node
+     set core [mysim of addchild $imc_c "core" ""]
+     mysim of addprop $core string "compatible" "ibm,imc-counters"
+     mysim of addprop  $core string "events-prefix" "CPM_"
+     mysim of addprop  $core int "reg" 24
+     mysim of addprop  $core int "size" 8192
+     mysim of addprop  $core string "scale" "512"
+     mysim of addprop  $core int "events" $ct_et
+     mysim of addprop  $core int "type" 4
+
+     #Add a thread device node
+     set thread [mysim of addchild $imc_c "thread" ""]
+     mysim of addprop $thread string "compatible" "ibm,imc-counters"
+     mysim of addprop  $thread string "events-prefix" "CPM_"
+     mysim of addprop  $thread int "reg" 24
+     mysim of addprop  $thread int "size" 8192
+     mysim of addprop  $thread string "scale" "512"
+     mysim of addprop  $thread int "events" $ct_et
+     mysim of addprop  $thread int "type" 1
+}
+
 mconfig enable_stb SKIBOOT_ENABLE_MAMBO_STB 0
 
 if { [info exists env(SKIBOOT_ENABLE_MAMBO_STB)] } {
diff --git a/hw/imc.c b/hw/imc.c
index ccf3973..60fc39d 100644
--- a/hw/imc.c
+++ b/hw/imc.c
@@ -310,9 +310,14 @@ static void disable_unavailable_units(struct dt_node *dev)
 	cb = get_imc_cb(this_cpu()->chip_id);
 	if (cb)
 		avl_vec = be64_to_cpu(cb->imc_chip_avl_vector);
-	else
+	else {
 		avl_vec = 0; /* Remove only nest imc device nodes */
 
+		/* Incase of mambo, just fake it */
+		if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS)
+			avl_vec = (0xffULL) << 56;
+	}
+
 	for (i = 0; i < MAX_NEST_UNITS; i++) {
 		if (!(PPC_BITMASK(i, i) & avl_vec)) {
 			/* Check if the device node exists */
@@ -365,6 +370,9 @@ void imc_catalog_preload(void)
 	int ret = OPAL_SUCCESS;
 	compress_buf_size = MAX_COMPRESSED_IMC_DTB_SIZE;
 
+	if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS)
+		return;
+
 	/* Enable only for power 9 */
 	if (proc_gen != proc_gen_p9)
 		return;
@@ -421,11 +429,20 @@ static void imc_dt_update_nest_node(struct dt_node *dev)
  */
 void imc_init(void)
 {
-	void *decompress_buf;
+	void *decompress_buf = NULL;
 	uint32_t pvr = (mfspr(SPR_PVR) & ~(0xf000));
 	struct dt_node *dev;
 	int ret;
 
+	if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS) {
+		dev = dt_find_compatible_node(dt_root, NULL,
+					"ibm,opal-in-memory-counters");
+		if (!dev)
+			return;
+
+		goto imc_mambo;
+	}
+
 	/* Enable only for power 9 */
 	if (proc_gen != proc_gen_p9)
 		return;
@@ -481,6 +498,7 @@ void imc_init(void)
 		goto err;
 	}
 
+imc_mambo:
 	/* Check and remove unsupported imc device types */
 	check_imc_device_type(dev);
 
@@ -496,6 +514,9 @@ void imc_init(void)
 	/* Update the base_addr and chip-id for nest nodes */
 	imc_dt_update_nest_node(dev);
 
+	if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS)
+		return;
+
 	/*
 	 * If the dt_attach_root() fails, "imc-counters" node will not be
 	 * seen in the device-tree and hence OS should not make any
@@ -541,6 +562,9 @@ static int64_t opal_imc_counters_init(uint32_t type, uint64_t addr, uint64_t cpu
 		phys_core_id = cpu_get_core_index(c);
 		port_id = phys_core_id % 4;
 
+		if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS)
+			return OPAL_SUCCESS;
+
 		/*
 		 * Core IMC hardware mandate initing of three scoms
 		 * to enbale or disable of the Core IMC engine.
@@ -605,6 +629,9 @@ static int64_t opal_imc_counters_start(uint32_t type, uint64_t cpu_pir)
 		/* Set the run command */
 		op = NEST_IMC_ENABLE;
 
+		if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS)
+			return OPAL_SUCCESS;
+
 		/* Write the command to the control block now */
 		cb->imc_chip_command = cpu_to_be64(op);
 
@@ -617,6 +644,9 @@ static int64_t opal_imc_counters_start(uint32_t type, uint64_t cpu_pir)
 		phys_core_id = cpu_get_core_index(c);
 		port_id = phys_core_id % 4;
 
+		if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS)
+			return OPAL_SUCCESS;
+
 		/*
 		 * Enables the core imc engine by appropriately setting
 		 * bits 4-9 of the HTM_MODE scom port. No initialization
@@ -659,6 +689,9 @@ static int64_t opal_imc_counters_stop(uint32_t type, uint64_t cpu_pir)
 		/* Set the run command */
 		op = NEST_IMC_DISABLE;
 
+		if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS)
+			return OPAL_SUCCESS;
+
 		/* Write the command to the control block */
 		cb->imc_chip_command = cpu_to_be64(op);
 
@@ -672,6 +705,9 @@ static int64_t opal_imc_counters_stop(uint32_t type, uint64_t cpu_pir)
 		phys_core_id = cpu_get_core_index(c);
 		port_id = phys_core_id % 4;
 
+		if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS)
+			return OPAL_SUCCESS;
+
 		/*
 		 * Disables the core imc engine by clearing
 		 * bits 4-9 of the HTM_MODE scom port.