diff options
author | Nicholas Piggin <npiggin@gmail.com> | 2021-12-20 21:08:52 +1000 |
---|---|---|
committer | Cédric Le Goater <clg@kaod.org> | 2022-01-03 15:19:06 +0100 |
commit | 7e1397f23f15be0fa916ab921477d0d0c5a8d4aa (patch) | |
tree | 444646923106ca1ea968695cc49f1258f0f4a845 | |
parent | dc5ee56a31ee6aa8f60918e9baceff4ce98c7c72 (diff) | |
download | skiboot-7e1397f23f15be0fa916ab921477d0d0c5a8d4aa.zip skiboot-7e1397f23f15be0fa916ab921477d0d0c5a8d4aa.tar.gz skiboot-7e1397f23f15be0fa916ab921477d0d0c5a8d4aa.tar.bz2 |
fast-reboot: fix TLB cleanup after fast reboot
POWER9/10 are missing TLB flushing after fast reboot. Add it back to
cpu_fast_reboot_complete(), which is where fast-reboot code thinks it
should be.
Suggested-by: Cédric Le Goater <clg@fr.ibm.com>
Fixes: 53ef0db6e2 ("asm/head.S: set POWER9 radix HID bit at entry")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
-rw-r--r-- | core/cpu.c | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -1570,6 +1570,10 @@ void cpu_fast_reboot_complete(void) /* and set HID0:RADIX */ if (proc_gen == proc_gen_p9) current_radix_mode = true; + + /* P8 clears TLBs in cleanup_cpu_state() */ + if (proc_gen >= proc_gen_p9) + cleanup_global_tlb(); } static int64_t opal_reinit_cpus(uint64_t flags) |