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author | Andrew Donnellan <andrew.donnellan@au1.ibm.com> | 2018-06-25 11:40:03 +1000 |
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committer | Stewart Smith <stewart@linux.ibm.com> | 2018-06-27 17:19:01 +1000 |
commit | 44709b88491c63d75febc5f4859a0b1a580a9232 (patch) | |
tree | beffe45940c43b1c48ac4643a31fd3298d59c062 | |
parent | 861350941f9a3fb76ebcae3e5a32b3cbec929d03 (diff) | |
download | skiboot-44709b88491c63d75febc5f4859a0b1a580a9232.zip skiboot-44709b88491c63d75febc5f4859a0b1a580a9232.tar.gz skiboot-44709b88491c63d75febc5f4859a0b1a580a9232.tar.bz2 |
hw/npu2, core/hmi: Use NPU instead of NPU2 as log message prefix
The NPU2{DBG,INF,ERR} macros use "NPU%d" as a prefix to identify messages
relating to a particular NPU.
It's slightly confusing to have per-NPU messages prefixed with "NPU0" or
"NPU1" and NPU-generic messages prefixed with "NPU2". On some future system
we could potentially have a NPU #2 in which case it'd be really confusing.
Use NPU rather than NPU2 for NPU-generic log messages. There's no risk of
confusion with the original npu.c code since that's only for P8.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Acked-by: Reza Arbab <arbab@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
-rw-r--r-- | core/hmi.c | 6 | ||||
-rw-r--r-- | hw/npu2.c | 16 |
2 files changed, 11 insertions, 11 deletions
@@ -694,9 +694,9 @@ static void find_npu2_checkstop_reason(int flat_chip_id, loc = chip_loc_code(flat_chip_id); if (!loc) loc = "Not Available"; - prlog(PR_ERR, "NPU2: [Loc: %s] P:%d FIR#%d FIR 0x%016llx mask 0x%016llx\n", + prlog(PR_ERR, "NPU: [Loc: %s] P:%d FIR#%d FIR 0x%016llx mask 0x%016llx\n", loc, flat_chip_id, i, npu2_fir, npu2_fir_mask); - prlog(PR_ERR, "NPU2: [Loc: %s] P:%d ACTION0 0x%016llx, ACTION1 0x%016llx\n", + prlog(PR_ERR, "NPU: [Loc: %s] P:%d ACTION0 0x%016llx, ACTION1 0x%016llx\n", loc, flat_chip_id, npu2_fir_action0, npu2_fir_action1); total_errors++; } @@ -718,7 +718,7 @@ static void find_npu2_checkstop_reason(int flat_chip_id, if (npu2_hmi_verbose) { _xscom_lock(); - dump_scoms(flat_chip_id, "NPU2", npu2_scom_dump, loc); + dump_scoms(flat_chip_id, "NPU", npu2_scom_dump, loc); _xscom_unlock(); prlog(PR_ERR, " _________________________ \n"); prlog(PR_ERR, "< It's Driver Debug time! >\n"); @@ -650,7 +650,7 @@ static int npu2_dn_fixup(struct phb *phb, * @fwts-advice No GPU/NPU2 slot information was found. * NVLink2 functionality will not work. */ - prlog(PR_ERR, "NPU2: Cannot find GPU slot information\n"); + prlog(PR_ERR, "NPU: Cannot find GPU slot information\n"); return 0; } dt_add_property_string(pd->dn, "ibm,loc-code", label); @@ -1354,7 +1354,7 @@ static void npu2_probe_phb(struct dt_node *dn) if (dt_find_compatible_node(dn, NULL, "ibm,npu-link-opencapi")) { /* Die if there's also an NVLink link */ assert(!dt_find_compatible_node(dn, NULL, "ibm,npu-link")); - prlog(PR_INFO, "NPU2: OpenCAPI link configuration detected, " + prlog(PR_INFO, "NPU: OpenCAPI link configuration detected, " "not initialising NVLink\n"); return; } @@ -1365,7 +1365,7 @@ static void npu2_probe_phb(struct dt_node *dn) proc_chip = get_chip(gcid); assert(proc_chip); if ((proc_chip->ec_level & 0xf0) > 0x20) { - prerror("NPU2: unsupported ec level on Chip 0x%x!\n", gcid); + prerror("NPU: unsupported ec level on Chip 0x%x!\n", gcid); return; } @@ -1437,7 +1437,7 @@ static void npu2_probe_phb(struct dt_node *dn) index = dt_prop_get_u32(dn, "ibm,npu-index"); phb_index = dt_prop_get_u32(dn, "ibm,phb-index"); links = dt_prop_get_u32(dn, "ibm,npu-links"); - prlog(PR_INFO, "NPU2: Chip %d Found NPU2#%d (%d links) at %s\n", + prlog(PR_INFO, "NPU: Chip %d Found NPU2#%d (%d links) at %s\n", gcid, index, links, path); free(path); @@ -1915,7 +1915,7 @@ static void npu2_setup_irqs(struct npu2 *p) p->base_lsi = xive_alloc_ipi_irqs(p->chip_id, NPU2_N_DL_IRQS, NPU2_N_DL_IRQS_ALIGN); if (p->base_lsi == XIVE_IRQ_ERROR) { - prlog(PR_ERR, "NPU2: Failed to allocate interrupt sources, IRQs for NDL No-stall events will not be available.\n"); + prlog(PR_ERR, "NPU: Failed to allocate interrupt sources, IRQs for NDL No-stall events will not be available.\n"); return; } xive_register_ipi_source(p->base_lsi, NPU2_N_DL_IRQS, p, &npu2_ipi_ops ); @@ -1984,7 +1984,7 @@ static void npu2_create_phb(struct dt_node *dn) * @fwts-advice Firmware probably ran out of memory creating * NPU2 slot. NVLink functionality could be broken. */ - prlog(PR_ERR, "NPU2: Cannot create PHB slot\n"); + prlog(PR_ERR, "NPU: Cannot create PHB slot\n"); } pci_register_phb(&p->phb_nvlink, OPAL_DYNAMIC_PHB_ID); @@ -2004,7 +2004,7 @@ void probe_npu2(void) (chip->type == PROC_CHIP_P9_NIMBUS || chip->type == PROC_CHIP_P9_CUMULUS) && (chip->ec_level & 0xf0) == 0x10) { - prlog(PR_INFO, "NPU2: DD1 not supported\n"); + prlog(PR_INFO, "NPU: DD1 not supported\n"); return; } @@ -2012,7 +2012,7 @@ void probe_npu2(void) zcal = nvram_query("nv_zcal_override"); if (zcal) { nv_zcal_nominal = atoi(zcal); - prlog(PR_WARNING, "NPU2: Using ZCAL impedance override = %d\n", nv_zcal_nominal); + prlog(PR_WARNING, "NPU: Using ZCAL impedance override = %d\n", nv_zcal_nominal); } /* Scan NPU2 XSCOM nodes */ |