diff options
author | Reza Arbab <arbab@linux.vnet.ibm.com> | 2017-07-31 21:36:58 -0500 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-08-04 17:13:10 +1000 |
commit | 1e6dfbcda9da0b7bc0ade174f0e14e070420f7fc (patch) | |
tree | 7752f00b96ff14233be81e17d7deca9ea50dd9e4 | |
parent | 5d706909572573de12e2879d26a89805972d38ab (diff) | |
download | skiboot-1e6dfbcda9da0b7bc0ade174f0e14e070420f7fc.zip skiboot-1e6dfbcda9da0b7bc0ade174f0e14e070420f7fc.tar.gz skiboot-1e6dfbcda9da0b7bc0ade174f0e14e070420f7fc.tar.bz2 |
npu2: Fix indirect SCOM addresses
Change these values for POWER9 DD2, but keep backwards compatibility.
Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com>
Acked-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Cc: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r-- | hw/npu2.c | 14 | ||||
-rw-r--r-- | include/npu2-regs.h | 6 |
2 files changed, 15 insertions, 5 deletions
@@ -75,26 +75,34 @@ static bool is_p9dd1(void) static void npu2_scom_set_addr(uint64_t gcid, uint64_t scom_base, uint64_t addr, uint64_t size) { + uint64_t isa = is_p9dd1() ? NPU2_DD1_MISC_SCOM_IND_SCOM_ADDR : + NPU2_MISC_SCOM_IND_SCOM_ADDR; + addr = SETFIELD(NPU2_MISC_DA_ADDR, 0ull, addr); addr = SETFIELD(NPU2_MISC_DA_LEN, addr, size); - xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_ADDR, addr); + xscom_write(gcid, scom_base + isa, addr); } static void npu2_scom_write(uint64_t gcid, uint64_t scom_base, uint64_t reg, uint64_t size, uint64_t val) { + uint64_t isd = is_p9dd1() ? NPU2_DD1_MISC_SCOM_IND_SCOM_DATA : + NPU2_MISC_SCOM_IND_SCOM_DATA; + npu2_scom_set_addr(gcid, scom_base, reg, size); - xscom_write(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, val); + xscom_write(gcid, scom_base + isd, val); } static uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, uint64_t reg, uint64_t size) { uint64_t val; + uint64_t isd = is_p9dd1() ? NPU2_DD1_MISC_SCOM_IND_SCOM_DATA : + NPU2_MISC_SCOM_IND_SCOM_DATA; npu2_scom_set_addr(gcid, scom_base, reg, size); - xscom_read(gcid, scom_base + NPU2_MISC_SCOM_IND_SCOM_DATA, &val); + xscom_read(gcid, scom_base + isd, &val); return val; } diff --git a/include/npu2-regs.h b/include/npu2-regs.h index 2ddfd4b..4b86f6f 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -441,11 +441,13 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask); #define NPU2_XTS_MMIO_ATSD_STATUS 0x010 /* ALTD SCOM addresses */ -#define NPU2_MISC_SCOM_IND_SCOM_ADDR 0x38e +#define NPU2_DD1_MISC_SCOM_IND_SCOM_ADDR 0x38e +#define NPU2_MISC_SCOM_IND_SCOM_ADDR 0x68e #define NPU2_MISC_DA_ADDR PPC_BITMASK(0, 23) #define NPU2_MISC_DA_LEN PPC_BITMASK(24, 25) #define NPU2_MISC_DA_LEN_4B 2 #define NPU2_MISC_DA_LEN_8B 3 -#define NPU2_MISC_SCOM_IND_SCOM_DATA 0x38f +#define NPU2_DD1_MISC_SCOM_IND_SCOM_DATA 0x38f +#define NPU2_MISC_SCOM_IND_SCOM_DATA 0x68f #endif /* __NPU2_REGS_H */ |