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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-09-10 17:35:56 +1000 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-09-12 22:52:08 -0500 |
commit | 1cf6072fb8f7d4925fec6562f0c4fc265a146898 (patch) | |
tree | ed2e17aa8aaa10a1f2a68e9f0753679c229d30a4 | |
parent | 3d9a256213bdd750749afd10ce83bad1a4244c46 (diff) | |
download | skiboot-1cf6072fb8f7d4925fec6562f0c4fc265a146898.zip skiboot-1cf6072fb8f7d4925fec6562f0c4fc265a146898.tar.gz skiboot-1cf6072fb8f7d4925fec6562f0c4fc265a146898.tar.bz2 |
xive: Don't try setting the reserved ACK# field in VPs
That doesn't work, the HW doesn't implement it in the cache
watch facility anyway.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r-- | hw/xive.c | 5 |
1 files changed, 1 insertions, 4 deletions
@@ -882,11 +882,8 @@ static void xive_init_default_vp(struct xive_vp *vp, { memset(vp, 0, sizeof(struct xive_vp)); - /* Stash the EQ base in the pressure relief interrupt field - * and set the ACK# to 0xff to disable pressure relief interrupts - */ + /* Stash the EQ base in the pressure relief interrupt field */ vp->w1 = (eq_blk << 28) | eq_idx; - vp->w5 = 0xff000000; vp->w0 = VP_W0_VALID; } |