diff options
| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2019-05-29 16:58:59 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2019-06-03 10:28:57 +1000 |
| commit | d496bb141c978a6dc8a106b3d92e5fc1ad0f8663 (patch) | |
| tree | 5da14ca8321145e59ef1bcf91a8962e02502eabf | |
| parent | 6c0a6612f4920438e19d68e0c7146a5ef5fec877 (diff) | |
| download | skiboot-d496bb141c978a6dc8a106b3d92e5fc1ad0f8663.zip skiboot-d496bb141c978a6dc8a106b3d92e5fc1ad0f8663.tar.gz skiboot-d496bb141c978a6dc8a106b3d92e5fc1ad0f8663.tar.bz2 | |
npu2: Clear fence state for a brick being reset
Resetting a GPU before resetting an NVLink leads to occasional HMIs
which fence some bricks and prevent the "reset_ntl" procedure from
succeeding at the "reset_ntl_release" step - the host system requires
reboot; there may be other cases like this as well.
This adds clearing of the fence bit in NPU.MISC.FENCE_STATE for
the NVLink which we are about to reset.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
| -rw-r--r-- | hw/npu2-hw-procedures.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c index e1f5e8d..0779dde 100644 --- a/hw/npu2-hw-procedures.c +++ b/hw/npu2-hw-procedures.c @@ -283,6 +283,14 @@ uint32_t reset_ntl(struct npu2_dev *ndev) phy_write_lane(ndev, &NPU2_PHY_TX_LANE_PDWN, lane, 0); } + /* Clear fence state for the brick */ + val = npu2_read(ndev->npu, NPU2_MISC_FENCE_STATE); + if (val & PPC_BIT(ndev->brick_index)) { + NPU2DEVINF(ndev, "Clearing brick fence\n"); + val = PPC_BIT(ndev->brick_index); + npu2_write(ndev->npu, NPU2_MISC_FENCE_STATE, val); + } + /* Write PRI */ val = SETFIELD(PPC_BITMASK(0,1), 0ull, obus_brick_index(ndev)); npu2_write_mask(ndev->npu, NPU2_NTL_PRI_CFG(ndev), val, -1ULL); |