From d496bb141c978a6dc8a106b3d92e5fc1ad0f8663 Mon Sep 17 00:00:00 2001 From: Alexey Kardashevskiy Date: Wed, 29 May 2019 16:58:59 +1000 Subject: npu2: Clear fence state for a brick being reset Resetting a GPU before resetting an NVLink leads to occasional HMIs which fence some bricks and prevent the "reset_ntl" procedure from succeeding at the "reset_ntl_release" step - the host system requires reboot; there may be other cases like this as well. This adds clearing of the fence bit in NPU.MISC.FENCE_STATE for the NVLink which we are about to reset. Signed-off-by: Alexey Kardashevskiy Signed-off-by: Stewart Smith --- hw/npu2-hw-procedures.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c index e1f5e8d..0779dde 100644 --- a/hw/npu2-hw-procedures.c +++ b/hw/npu2-hw-procedures.c @@ -283,6 +283,14 @@ uint32_t reset_ntl(struct npu2_dev *ndev) phy_write_lane(ndev, &NPU2_PHY_TX_LANE_PDWN, lane, 0); } + /* Clear fence state for the brick */ + val = npu2_read(ndev->npu, NPU2_MISC_FENCE_STATE); + if (val & PPC_BIT(ndev->brick_index)) { + NPU2DEVINF(ndev, "Clearing brick fence\n"); + val = PPC_BIT(ndev->brick_index); + npu2_write(ndev->npu, NPU2_MISC_FENCE_STATE, val); + } + /* Write PRI */ val = SETFIELD(PPC_BITMASK(0,1), 0ull, obus_brick_index(ndev)); npu2_write_mask(ndev->npu, NPU2_NTL_PRI_CFG(ndev), val, -1ULL); -- cgit v1.1