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2024-11-03esp-scsi: indicate acceptance of MESSAGE IN phase dataMark Cave-Ayland1-1/+3
When the target has sent its MESSAGE IN phase data to the initiator, it waits for the initiator to release the ACK signal before disconnecting from the bus. Send a MSG_ACC command to the ESP so that the initiator releases the ACK signal to allow the target to disconnect, and also return the ASC back to the disconnected state. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20240829115846.954993-1-mark.cave-ayland@ilande.co.uk> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2024-05-15pcidevice: Use portaddr_t for io port addressesHelge Deller2-3/+3
This is needed on parisc, since parisc uses 32-bit I/O port addressses while Intel uses just 16 bits. Signed-off-by: Helge Deller <deller@gmx.de>
2024-01-04ehci: Fix build on 64-bitHelge Deller1-1/+1
Signed-off-by: Helge Deller <deller@gmx.de>
2024-01-04block/ata: Fixes to allow building 64-bit firmwareHelge Deller1-3/+3
Signed-off-by: Helge Deller <deller@gmx.de>
2024-01-04esp-scsi: terminate DMA transfer when ESP data transfer completesMark Cave-Ayland1-0/+2
When the ESP data transfer completes indicated by the STAT_TC flag being set, terminate the DMA transfer by issuing a DMA IDLE command. Otherwise in the case where the guest sends a reset followed by an ESP command, the DMA signal remains enabled and so the next SeaBIOS DMA transfer begins immediately when the next ESP command is received rather than waiting until the data is ready and the DMA command is issued. With this fix it is possible to boot a Windows XP ISO to the installer and complete a full installation within QEMU directly using SeaBIOS. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-01-04parisc/scsi: Add maximum transfer size per SCSI controllerHelge Deller2-0/+2
LSI controller allows up to 4MB transactions per call, the ESP controller only up to 64k per call. Values for other drivers need to be added too. Signed-off-by: Helge Deller <deller@gmx.de>
2024-01-04parisc: Fix detection of mptsas and esp scsi driversHelge Deller1-12/+12
Make sure that inl()/outl() works correctly (with little-endian accesses) so that the scsi drivers can be used unchanged. Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-31parisc: Add timer2() wait function to cope with 32-bit timer limitHelge Deller1-6/+19
Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-31parisc: USB OHCI endianess fixesHelge Deller3-18/+19
Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-14parisc/c3700: Add support for C3700 workstation with Astro/ElroyHelge Deller3-2/+71
Major changes to support 64-bit machines with Astro and Elroy chips. This patch adds support for the C3700 workstation. Changes include: - Detect if the emulated CPU runs as 32-bit PA1.x or 64-bit PA2.x CPU - Add support for Astro and Elroy chips: * build interrupt routing table (IRT) * add PCI irq to pci_device struct - Enhance PCI bus scanning * Add support for various PCI cards (serial, USB, graphics, ...) - Change PCI I/O accessor functions: * readX()/writeX() do byteswapping and take an ioremapped address * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address. * gsc_*() don't byteswap and operate on physical addresses Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-14parisc/blockcmd: Drop debug outputHelge Deller1-1/+1
Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-14parisc/usb: Fix usb host for big-endian machines (like parisc)Helge Deller2-51/+54
Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-14parisc/serialio: Use portaddr_t type for DebugOutputPortHelge Deller1-1/+2
Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-14parisc/rtc: Drop parisc specific RTC portsHelge Deller1-7/+0
Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-14parisc/ata: Drop parisc specific ISA ATA portsHelge Deller1-8/+0
Signed-off-by: Helge Deller <deller@gmx.de>
2023-09-16esp-scsi: handle non-DMA SCSI commands with no data phaseMark Cave-Ayland1-1/+10
The existing esp-scsi state machine checks for the STAT_TC bit to exit state 1 but in the case where there is no data phase, a non-DMA command is executed which doesn't set STAT_TC. This only works because QEMU currently always sets STAT_TC just after issuing every SCSI command. Update the esp-scsi state machine so that in the case where there is no data phase, we immediately execute CMD_ICCS instead of waiting for STAT_TC to be set which will never happen with a non-DMA CMD_SELATN command. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20230807065300.366070-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-09-16esp-scsi: check for INTR_BS/INTR_FC instead of STAT_TC for command completionMark Cave-Ayland1-14/+22
The ESP SELATN command used to send SCSI commands from the ESP to the SCSI bus is not a DMA command and therefore does not affect the STAT_TC bit. The only reason this works at all is due to a bug in QEMU which (currently) always updates the STAT_TC bit in ESP_RSTAT regardless of the state of the ESP_CMD_DMA bit. According to the NCR datasheet [1] the INTR_BS/INTR_FC bits are set when the SELATN command has completed, so update the existing logic to check for these bits in ESP_RINTR instead. Note that the read of ESP_RINTR needs to be restricted to state == 0 as reading ESP_RINTR resets the ESP_RSTAT register which breaks the STAT_TC check when state == 1. This commit also includes an extra read of ESP_INTR to clear all the interrupt bits before submitting the SELATN command to ensure that we don't accidentally immediately progress to the data phase handling logic where ESP_RINTR bits have already been set by a previous ESP command. [1] "NCR 53C94, 53C95, 53C96 Advanced SCSI Controller" NCR_53C94_53C95_53C96_Data_Sheet_Feb90.pdf Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20230807065300.366070-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-09-16esp-scsi: flush FIFO before sending SCSI commandMark Cave-Ayland1-0/+4
The ESP FIFO is used as a buffer for DMA requests and so isn't guaranteed to be empty in the case of SCSI errors or a mixed DMA/non-DMA request. Flush the FIFO before sending a SCSI command to guarantee that it is correctly positioned at the start of the FIFO. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230807065300.366070-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-09-24ata.c: Add missing endianess conversion functionsHelge Deller1-10/+10
PA-RISC is big endian. Add necessary endianess conversion functions to get disc detection correct. Signed-off-by: Helge Deller <deller@gmx.de>
2021-09-24serialio.h: Add serial port adresses for PA-RISCHelge Deller1-0/+8
Signed-off-by: Helge Deller <deller@gmx.de>
2021-09-24rtc.h: Add CMOS/RTC addresses for PA-RISCHelge Deller1-0/+7
Signed-off-by: Helge Deller <deller@gmx.de>
2021-09-24pci.c: Add PCI ports for PA-RISC and access PCI bus in little-endianHelge Deller1-4/+9
Add the IO-Ports for the PCI bus on PA-RISC. The PCI bus is little-endian on x86 and PA-RISC, so add the necessary conversions for PA-RISC. Signed-off-by: Helge Deller <deller@gmx.de>
2021-09-24lsi-scsi.c: Convert SCSI script to little endianHelge Deller1-0/+4
The lsi-scsi driver expects the SCSI script in little-endian format. Do this conversion on PA-RISC (which is big-endian). On x86 this conversion will be optimized away. Signed-off-by: Helge Deller <deller@gmx.de>
2021-09-24scsi: Add fields for specifying target and lun of SCSI devicesHelge Deller10-10/+12
On PA-RISC it's possible to boot from various SCSI targets and LUNs. Add fields to the drive_s struct to be able to store those. Signed-off-by: Helge Deller <deller@gmx.de>
2021-09-24blockcmd.c: Prevent unaligned access crash on PA-RISCHelge Deller1-5/+8
The cdbcmd pointer given to scsi_fill_cmd() can point to an unaligned address. On x86 writing a 64-bit value to an unaligned address will succeed, while on PA-RISC the machine will stop with an unaligned access error (esp. since the fault handlers are not implemented in the firmware). Work around that issue by using a temporary variable and copy it to the destination when finished. Signed-off-by: Helge Deller <deller@gmx.de>
2021-09-24ata.h: Add ATA IDE port addresses for PA-RISCHelge Deller1-0/+8
Signed-off-by: Helge Deller <deller@gmx.de>
2021-09-24ata.c: Allow to boot on PA-RISCHelge Deller1-1/+1
Fix linkage problem on PA-RISC, no functional change on x86. Signed-off-by: Helge Deller <deller@gmx.de>
2021-09-24Add portaddr_t typedef to specify I/O port addressesHelge Deller4-29/+29
On x86 I/O ports are located below address 0x4000, while on PA-RISC I/O ports are allowed in the whole 32/64 bit address space. So, introduce a portaddr_t typedef which defaults to the current u16 type on x86 and to unsigned long on PA-RISC. Signed-off-by: Helge Deller <deller@gmx.de>
2021-06-30nvme: fix missing newline on sq full printAlex Martens via SeaBIOS1-1/+1
Signed-off-by: Alex Martens <alexmgit@protonmail.com>
2021-05-31nvme: drive desc should not include the newlineGerd Hoffmann1-2/+2
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-05-31nvme: improve namespace allocationGerd Hoffmann2-25/+16
Instead of allocating a big array upfront go probe the namespaces and only allocate an nvme_namespace struct for those namespaces which are actually active. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-03-10usb-hid: Increase MAX_KBD_EVENTStefan Ott via SeaBIOS1-1/+1
Some USB keyboards use max packet sizes beyond the current maximum supported by SeaBIOS. This increases the available size to support keyboards such as the Matias Ergo Pro. Signed-off-by: Stefan Ott <stefan@ott.net>
2020-12-21Support booting USB drives with a write protect switch enabledMike Banon1-3/+7
At least some USB drives with a write protect switch (e.g. Netac U335) could report "MEDIUM NOT PRESENT" for a while if a write protection is enabled. Instead of stopping the initialization attempts immediately, stop only after getting this report for 3 times, to ensure the successful initialization of such a "broken hardware". Signed-off-by: Mike Banon <mikebdp2@gmail.com>
2020-11-16nvme: Clean up nvme_cmd_readwrite()David Woodhouse1-44/+33
This ended up with an odd mix of recursion (albeit *mostly* tail-recursion) and interation that could have been prettier. In addition, while recursing it potentially adjusted op->count which is used by callers to see the amount of I/O actually performed. Fix it by bringing nvme_build_prpl() into the normal loop using 'i' as the offset in the op. Fixes: 94f0510dc ("nvme: Split requests by maximum allowed size") Reviewed-by: Alexander Graf <graf@amazon.com> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
2020-10-28nvme: Split requests by maximum allowed sizeAlexander Graf1-0/+16
Some NVMe controllers only support small maximum request sizes, such as the AWS EBS NVMe implementation which only supports NVMe requests of up to 32 pages (256kb) at once. BIOS callers can exceed those request sizes by defining sector counts above this threshold. Currently we fall back to the bounce buffer implementation for those. This is slow. This patch introduces splitting logic to the NVMe I/O request code so that every NVMe I/O request gets handled in a chunk size that is consumable by the NVMe adapter, while maintaining the fast path PRPL logic we just introduced. Signed-off-by: Alexander Graf <graf@amazon.com>
2020-10-28nvme: Pass large I/O requests as PRP listsAlexander Graf2-10/+82
Today, we split every I/O request into at most 4kb chunks and wait for these requests to finish. We encountered issues where the backing storage is network based, so every I/O request needs to go over the network with associated latency cost. A few ms of latency when loading 100MB initrd in 4kb chunks does add up. NVMe implements a feature to allow I/O requests spanning multiple pages, called PRP lists. This patch takes larger I/O operations and checks if they can be directly passed to the NVMe backing device as PRP list. At least for grub, read operations can always be mapped directly into PRP list items. This reduces the number of I/O operations required during a typical boot path by roughly a factor of 5. Signed-off-by: Alexander Graf <graf@amazon.com>
2020-10-28nvme: Allow to set PRP2Alexander Graf1-5/+6
When creating a PRP based I/O request, we pass in the pointer to operate on. Going forward, we will want to be able to pass additional pointers though for mappings above 4k. This patch adds a parameter to nvme_get_next_sqe() to pass in the PRP2 value of an NVMe I/O request, paving the way for a future patch to implement PRP lists. Signed-off-by: Alexander Graf <graf@amazon.com> Reviewed-by: Filippo Sironi <sironi@amazon.de>
2020-10-28nvme: Record maximum allowed request sizeAlexander Graf2-3/+18
NVMe has a limit on how many sectors it can handle at most within a single request. Remember that number, so that in a follow-up patch, we can verify that we don't exceed it. Signed-off-by: Alexander Graf <graf@amazon.com>
2020-10-13usb/xhci: add support for mmio host adapters (via acpi).Gerd Hoffmann1-0/+31
Add xhci_controller_setup_acpi() function to initialize usb host adapters declared in the DSDT table. Search the acpi devices list for xhci controllers. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20200930111433.21533-4-kraxel@redhat.com
2020-10-13usb/xhci: split xhci setup into generic and pci partsGerd Hoffmann1-13/+27
Split the pci-specific code into a separate xhci_controller_setup_pci() function, turn xhci_controller_setup() to a generic xhci setup function which only needs the mmio address if the control registers. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20200930111433.21533-3-kraxel@redhat.com
2020-10-13usb: add boot prio support for mmio host adaptersGerd Hoffmann1-0/+1
Add mmio field to usb controller struct, add support for mmio-mapped usb host adapters to boot order handling. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20200930111433.21533-2-kraxel@redhat.com
2020-09-30USB:Fix xHCI initail fail by using longer reset and CNR clear timeout valueweitaowang-oc@zhaoxin.com1-2/+2
Some xHCI controller's reset time than 100ms,such as 120ms. On the on hand, xHCI spec has not specified a timeout value. Maybe setting xHCI HCRST and CNR bit clear timeout value larger is a nice thing.As a compromise between compatibility and latency,we can take 1000ms as a timeout value. Signed-off-by: WeitaoWangoc <WeitaoWang-oc@zhaoxin.com> Message-Id: <159698294308.14.13067234241650533818@b63950293ec5>
2020-09-25usb.c: Fix devices using non-primary interface descriptorMatt DeVillier1-8/+19
A fair number of USB devices (keyboards in particular) use an interface descriptor other than the first available, making them non-functional currently. To correct this, iterate through all available interface descriptors until one with the correct class/subclass is found, then proceed to set the configuration and setup the driver. Tested on an ultimate hacking keyboard (UHK 60) Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-07-28nvme: Increase `nvme_cmd_readwrite()` message log level from 3 to 5Paul Menzel1-1/+1
Currently, setting SeaBIOS debug level to 3, the log is filled with messages like below. ns 1 read lba 11346288+8: 0 ns 1 read lba 11346296+4: 0 ns 1 read lba 11346300+4: 0 ns 1 read lba 11346304+8: 0 ns 1 read lba 11346312+8: 0 ns 1 read lba 11346320+8: 0 ns 1 read lba 11346328+8: 0 ns 1 read lba 11346336+8: 0 With SeaBIOS as coreboot payload, this fills up the CBMEM console buffer. So, increase the debug level to 5, so possible console buffer do not overflow. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
2020-07-28virtio-scsi: fix boot prio detection by using correct lunStefan Reiter1-3/+3
Commits d6bdb85eb0 virtio-scsi: skip initializing non-bootable devices f82e82a5ab2 virtio-mmio: add support for scsi devices. both use the lun value from tmpl_drv, which is always 0, instead of the correct one passed as a separate parameter. This causes systems where LUNs other than 0 are set as bootable, but 0 is not, to not boot. Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de> Signed-off-by: Stefan Reiter <s.reiter@proxmox.com>
2020-06-26timer: Handle decrements of PIT counterRoman Bolshakov1-1/+1
There's a fallback to PIT if TSC is not present but it doesn't work properly. It prevents boot from floppy on isapc and 486 cpu [1][2]. SeaBIOS configures PIT in Mode 2. PIT counter is decremented in the mode but timer_adjust_bits() thinks that the counter overflows and increases 32-bit tick counter on each detected "overflow". Invalid overflow detection results in 55ms time advance (1 / 18.2Hz) on each read from PIT counter. So all timers expire much faster and 5-second floppy timeout expires in 83 real microseconds (or just a bit longer). It can be fixed by making the counter recieved from PIT an increasing value so it can be passed to timer_adjust_bits(): 0, 1, 2 and up to 65535 and then the counter is re-loaded with 0. 1. https://bugs.launchpad.net/seabios/+bug/1840719 2. https://lists.gnu.org/archive/html/qemu-devel/2019-08/msg03924.html Fixes: eac11944019 ("Unify pmtimer_read() and pittimer_read() code.") Reported-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
2020-06-24serialio: Preserve Xen DebugOutputPortJason Andryuk1-0/+4
xen_preinit() runs early and changes DebugOutputPort. qemu_preinit() runs soon after. inb on DebugOutputPort doesn't work on Xen, so the check will always fail and DebugOutputPort will be cleared to 0 disabling output. Quick exit the function when running on Xen to preserve the modified DebugOutputPort. Signed-off-by: Jason Andryuk <jandryuk@gmail.com>
2020-05-25pci: fix mmconfig supportGerd Hoffmann1-6/+6
The MODESEGMENT condition is backwards, with the effect that mmconfig mode is not used to configure pci bars during POST. Oops. Fix it. The only real mode pci config space access seems to come from the ipxe option rom initialiation. Which happens to work via mmconfig because it runs in big real mode so this went unnoticed ... Fixes: 6a3b59ab9c7d ("pci: add mmconfig support") Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-05-21Revert "ps2port: adjust init routine to fix PS/2 keyboard issues"Kevin O'Connor1-13/+5
It is believed that the underlying problem was fixed in commit dbf9dd27f and therefore this commit is not necessary. This reverts commit bfdb3f86e9116fc79ce63c231373b084aad11218. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2020-05-15acpi: find and register virtio-mmio devicesGerd Hoffmann2-0/+21
Seach for virtio-mmio devices in the DSDT table, register the devices found. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
generated by cgit v1.1 at 2025-09-17 13:59:43 +0000