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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Also known as Fusion MPT disk; this controller model is supported
by VirtualBox and VMware, and QEMU support patches have been
posted.
Signed-off-by: Don Slutz <Don.Slutz@Gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Some BayTrail ChromeOS devices have the eMMC controller hidden (thus
requiring the use of etc/sdcard), while others do not, making it
problematic to have a single payload which serves all devices
properly. Therefore, if the CBFS contains etc/sdcard entries, skip
detection of any visible PCI sdhci controllers in order to avoid
duplicate entries in the boot menu.
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use case: cf cards behind sata-ide bridge, which might not support
the default transfer mode.
Based on a patch by Werner Zeh <werner.zeh@siemens.com>,
with some minor tweaks applied.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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The TIS timeouts for TPM 2 are different than for TPM 1.2.
Also the timeouts indicating a failed TPM 2 command are different.
Further, the command durations and timeouts cannot be read from the device.
We take the command timeout values for short, medium, and long running
commands from table 15 of the following specification:
TCG PC Client Platform TPM Profile (PTP) Specification
http://www.trustedcomputinggroup.org/resources/pc_client_platform_tpm_profile_ptp_specification
The values should work for all physical TPMs.
The tricky thing with virtualized environments is that the values
may need to be longer for a system where a vTPM cannot get sufficient
cycles. So a future patch _may_ need to multiply those values here
with some factor.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
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Extend the probing of the interface with TPM 2 specifics.
Use the new interface ID register of the TIS to check whether
a TPM 1.2 or a TPM 2 is underneath.
We select the TIS if possible and lock it so we can issue commands
during S3 for example and prevent the OS from changing to CRB type
of interface.
The register is described in table 13 here:
http://www.trustedcomputinggroup.org/resources/pc_client_platform_tpm_profile_ptp_specification
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Split pci.c into pci.c and pcidevice.c. The low-level code that
interacts directly with the PCI devices remains in pci.c, while
functions dealing with the higher level pci_device cache move to
pcidevice.c. Only pci.c is needed in 16bit mode.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Handle '%pP' format descriptions as a pointer to a 'struct pci_device'
and display it in bus:device.function (%02x:%02x.%x) format.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Set the pci->have_drivers flag for any device that calls
pci_enable_x() to ensure that the flag is consistently set on any
device with an internal driver. Setting this flag prevents an option
rom on the device from being executed.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
This patch also converts cap->addr from a 'u32' to a union storing a
'u32' or a 'void*'. This makes it more clear when the address is a
virtual memory address.
The virtio controller code will now explicitly set PCI_COMMAND_MEMORY
and/or PCI_COMMAND_IO instead of assuming it has already been enabled.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
The xhci controller code will now explicitly set PCI_COMMAND_MEMORY
instead of assuming it has already been enabled.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
The uhci controller code will now explicitly set PCI_COMMAND_IO
instead of assuming it has already been enabled.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
The ehci controller code will now explicitly set PCI_COMMAND_MEMORY
instead of assuming it has already been enabled.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
After this change, the sdcard driver will no longer enable
PCI_COMMAND_IO or PCI_COMMAND_MASTER accesses, as the sdcard driver
doesn't actually use IO BARs or implement DMA.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
The pvscsi controller code will now explicitly set PCI_COMMAND_MEMORY
instead of assuming it has already been enabled.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
After this change, the megasas driver will no longer enable
PCI_COMMAND_MEMORY accesses, as the megasas driver doesn't actually
map any BARs as memory.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
The lsi-scsi controller code will now explicitly set PCI_COMMAND_IO
instead of assuming it has already been enabled.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
The esp-scsi controller code will now explicitly set PCI_COMMAND_IO
instead of assuming it has already been enabled.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
The ATA controller code will now explicitly set PCI_COMMAND_IO instead
of assuming it has already been enabled.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use the pci_enable_x() functions.
This patch also converts cntl->iobase from a 'u32' to a 'void*' so
that it is clear that the address is a virtual memory address.
After this change, the AHCI driver will no longer enable
PCI_COMMAND_IO io accesses, as the AHCI driver doesn't actually
attempt IO accesses to the device.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Add functions to verify and obtain PCI BARs (Base Address Registers).
These new functions check that the requested BAR is of the right type
and appears valid.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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There are no longer any sleep or yield calls during the usb controller
device scans, so there is no need to run these device scans in a
separate thread.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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EHCI controller setup needs to occur prior to checking any UHCI or
OHCI ports to ensure a high speed device is not mistakenly configured
on a full speed "companion" controller. However, only the UHCI/OHCI
port scan needs to be delayed, not the full UHCI/OHCI controller init.
This change moves back the ehci controller setup check until port
scan in UHCI/OHCI.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The usbdev->slotid field is xhci specific and on xhci it is always
reachable from usbdev->defpipe->slotid.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Don't use the return codes from the 16bit BIOS spec in the internal
tpmhw functions. Only the 16bit BIOS interface code should need to
handle the details of that spec.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Move the hardware interface functions (tpmhw_probe, tpmhw_is_present,
tpmhw_transmit, and tpmhw_set_timeouts) to tpm_drivers.c code, and
only export those functions. This simplifies the hardware interface.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The sector count is a 64bit number that is often reported as a 32bit
number (due to limitations in dprintf). Consistently use "%u"
reporting to avoid confusing negative numbers.
Reported-by: Tobias Diedrich <tobiasdiedrich@gmail.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The scsi_is_ready() function may be called from a thread, and it is
not valid to call printf() from a thread. Convert printf() to
dprintf() to avoid this possibility.
This does mean that cdrom detection (from cdrom_boot() ) may not give
notification of slow cdrom drives to a user. However, the extra
medium detection time is unlikely to be large anyway.
Reported-by: Tobias Diedrich <tobiasdiedrich@gmail.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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If the set_address command fails, attempt to free up the slot resource
associated with the attempt.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Report the port state on a port status change notification. Clear the
change bits so further change notifications are delivered.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Some USB3 controllers (and/or devices) need additional time after the
device is detected to place the port in an enabled state. Wait for
the controller to report enabled before proceeding. This fixes
several reports of devices that showed a "stall" error (cc 4) during
set address.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Fix the timeouts and durations -- they are provided in microseconds.
Adapt the TPM driver for it.
Get TPM specific timeout and duration values earlier from the device.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
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Drop the code that is using the TPM for sha1 calculations.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
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Tested-by: Stefan Berger <stefanb@us.ibm.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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gcc v3.4 shows a warning due to "comparison is always false due to
limited range of data type". This patch fixes it.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
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On a timeout, report what register failed to update.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The block_size field is 16bits and only 16bit writes should be used
with it.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The SDHCI v1 spec only defines the first 9 error_irq_enable bits and
reserves other bits in the field. Don't enable the 10th bit (which
was defined in the v2 spec) as it's not needed anyway.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Some XHCI controllers register super-speed devices on high-speed ports
and then disconnect them when the super-speed detection completes.
Make sure to recognize these disconnect events during the reset
process.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Several users have reported devices that take more than 100ms to
announce their presence on a USB port. Allow the sigatt timeout to be
specified at runtime as a way to extend the default timeout.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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MMIO register space was off by 4 bytes, bottom bits of
PCI BAR registers are not part of the address.
Test boot on real hardware:
PCI device 00:14.7 (vd=3D1022:7813 c=3D0805)
Searching bootorder for: /pci@i0cf8/*@14,7
sdhci@0xfeb25500 ver=3D1001 cap=3D31fe3fb2 2570
sdcard_set_frequency 63 400 8000
sdcard_pio command stop (code=3D1)
sdcard_set_frequency 63 25000 200
Found sdcard at 0xfeb25500: SD card SD01G 982MiB
Registering bootable: SD card SD01G 982MiB (type:2 prio:103 data:f46e0)
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The C code only uses _cfuncX_ prefixes for parameters to the call32(),
stack_hop_back(), and call32_params() functions. It's simpler to use
macro wrappers around those functions which provide the required
prefix.
This also changes the parameter order of stack_hop() and
stack_hop_back() to use the more natural (func, params) ordering.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Move PAGE_SHIFT / virt_to_phys() to memmap.h and smp_[rw]mb() to
x86.h.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Don't do phys_to_virt(virt_to_phys(vaddr)) for page alignment - page
alignment can be determined directly from the virtual address.
Use the ALIGN() macro to make the code more readable.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Rename memmap.c to e820map.c as the code in that file only deals with
maintaining the e820 map. Move all the e820 definitions to new file
e820map.h and use a consistent "e820_" prefix on all exported
functions.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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