aboutsummaryrefslogtreecommitdiff
path: root/src/x86.h
diff options
context:
space:
mode:
authorKevin O'Connor <kevin@koconnor.net>2014-10-11 13:16:12 -0400
committerKevin O'Connor <kevin@koconnor.net>2014-10-15 12:10:52 -0400
commit341f8d98a087de01326634dd8a838381e7caa1c9 (patch)
tree475e024036dd267222c016ee3c9afba8e570a357 /src/x86.h
parent55215cd425d36b257104b9279541c886e7bab607 (diff)
downloadseabios-hppa-341f8d98a087de01326634dd8a838381e7caa1c9.zip
seabios-hppa-341f8d98a087de01326634dd8a838381e7caa1c9.tar.gz
seabios-hppa-341f8d98a087de01326634dd8a838381e7caa1c9.tar.bz2
Move a20 code from system.c and ps2port.h to x86.h
Although the a20 functionality was originally implemented in the ps2 controller, that is just a historical artifact. It's a core feature of modern x86 cpus and the code is better located in the x86.h header. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/x86.h')
-rw-r--r--src/x86.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/src/x86.h b/src/x86.h
index 65f42b3..57773d2 100644
--- a/src/x86.h
+++ b/src/x86.h
@@ -14,6 +14,10 @@
#define CR0_NW (1<<29) // Not Write-through
#define CR0_PE (1<<0) // Protection enable
+// PORT_A20 bitdefs
+#define PORT_A20 0x0092
+#define A20_ENABLE_BIT 0x02
+
#ifndef __ASSEMBLY__
#include "types.h" // u32
@@ -216,10 +220,19 @@ static inline void lgdt(struct descloc_s *desc) {
asm("lgdtl %0" : : "m"(*desc) : "memory");
}
+static inline u8 get_a20(void) {
+ return (inb(PORT_A20) & A20_ENABLE_BIT) != 0;
+}
+
+static inline u8 set_a20(u8 cond) {
+ u8 val = inb(PORT_A20);
+ outb((val & ~A20_ENABLE_BIT) | (cond ? A20_ENABLE_BIT : 0), PORT_A20);
+ return (val & A20_ENABLE_BIT) != 0;
+}
+
// x86.c
void cpuid(u32 index, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx);
-
#endif // !__ASSEMBLY__
#endif // x86.h