Fix winxp boot regression introduced in ecdc655a.

The winxp boot loader does something curious - it sets an int 0x1c
handler, records the stack location, and then spins in place with irqs
enabled.  The 0x1c handler alters the memory just past the stack
pointer so that when the timer irq returns the code jumps to a new
location and stop spinning.  The winxp code relies on the fact that a
hw irq will always place 6 bytes at a specific location and that it
can alter those bytes.

The ecdc655a patch does a full backup/restore of the register state.
Unfortunately, the restore overwrites the changes made by the winxp
0x1c handler.

This patch reverts much of ecdc655a.  Hardware irqs are still handled
on the extra stack, but only the essential register state is backed up
and restored.

Also, stack_hop_back is changed to only use %sp when changing states -
this enables the entry code to store just %esp instead of both %esp
and %sp.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>

1 files changed, 4 insertions, 4 deletions

diff --git a/src/misc.c b/src/misc.c
index d0d6665..b948778 100644
--- a/src/misc.c
+++ b/src/misc.c
@@ -55,9 +55,9 @@ handle_10(struct bregs *regs)
 
 // NMI handler
 void VISIBLE16
-handle_02(struct bregs *regs)
+handle_02(void)
 {
-    debug_enter(regs, DEBUG_ISR_02);
+    debug_isr(DEBUG_ISR_02);
 }
 
 void
@@ -71,9 +71,9 @@ mathcp_setup(void)
 
 // INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
 void VISIBLE16
-handle_75(struct bregs *regs)
+handle_75(void)
 {
-    debug_enter(regs, DEBUG_ISR_75);
+    debug_isr(DEBUG_ISR_75);
 
     // clear irq13
     outb(0, PORT_MATH_CLEAR);