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author | Helge Deller <deller@gmx.de> | 2024-01-01 23:47:08 +0100 |
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committer | Helge Deller <deller@gmx.de> | 2024-01-04 18:48:58 +0100 |
commit | beb4c49cfb1c9c31f6cfc698e2baa744cbe0b646 (patch) | |
tree | 6575b39bf7e78b2f7d3bc65ecb3264a2b727adf4 | |
parent | 1307a05301e45f18abb1678c692f1122cd043b37 (diff) | |
download | seabios-hppa-beb4c49cfb1c9c31f6cfc698e2baa744cbe0b646.zip seabios-hppa-beb4c49cfb1c9c31f6cfc698e2baa744cbe0b646.tar.gz seabios-hppa-beb4c49cfb1c9c31f6cfc698e2baa744cbe0b646.tar.bz2 |
parisc/B160L: fix inw/outw/inl/outl for B160L
This fixes SeaBIOS boot from dc390 SCSI controller on B160L.
Signed-off-by: Helge Deller <deller@gmx.de>
-rw-r--r-- | src/parisc/hppa.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/parisc/hppa.h b/src/parisc/hppa.h index 6290187..9c82b70 100644 --- a/src/parisc/hppa.h +++ b/src/parisc/hppa.h @@ -224,9 +224,9 @@ static inline void outl(u32 value, portaddr_t port) { *(volatile u32 *)(port) = be32_to_cpu(value); } else { /* write PCI I/O address to Dino's PCI_CONFIG_ADDR */ - outl(port, DINO_HPA + 0x064); + *(volatile u32 *)(DINO_HPA + 0x064) = port; /* write value to PCI_IO_DATA */ - outl(value, DINO_HPA + 0x06c); + *(volatile u32 *)(DINO_HPA + 0x06c) = cpu_to_le32(value); } } @@ -238,9 +238,9 @@ static inline void outw(u16 value, portaddr_t port) { *(volatile u16 *)(port) = be16_to_cpu(value); } else { /* write PCI I/O address to Dino's PCI_CONFIG_ADDR */ - outl(port, DINO_HPA + 0x064); + *(volatile u32 *)(DINO_HPA + 0x064) = port; /* write value to PCI_IO_DATA */ - outw(value, DINO_HPA + 0x06c); + *(volatile u16 *)(DINO_HPA + 0x06c) = cpu_to_le16(value); } } @@ -252,9 +252,9 @@ static inline void outb(u8 value, portaddr_t port) { *(volatile u8 *)(port) = value; } else { /* write PCI I/O address to Dino's PCI_CONFIG_ADDR */ - outl(port & ~3U, DINO_HPA + 0x064); + *(volatile u32 *)(DINO_HPA + 0x064) = port & ~3U; /* write value to PCI_IO_DATA */ - outb(value, DINO_HPA + 0x06c + (port & 3)); + *(volatile u8 *)(DINO_HPA + 0x06c + (port & 3)) = value; } } @@ -266,9 +266,9 @@ static inline u8 inb(portaddr_t port) { return *(volatile u8 *)(port); } else { /* write PCI I/O address to Dino's PCI_CONFIG_ADDR */ - outl(port & ~3U, DINO_HPA + 0x064); + *(volatile u32 *)(DINO_HPA + 0x064) = port & ~3U; /* read value to PCI_IO_DATA */ - return inb(DINO_HPA + 0x06c + (port & 3)); + return *(volatile u8 *)(DINO_HPA + 0x06c + (port & 3)); } } @@ -280,9 +280,9 @@ static inline u16 inw(portaddr_t port) { return *(volatile u16 *)(port); } else { /* write PCI I/O address to Dino's PCI_CONFIG_ADDR */ - outl(port & ~3U, DINO_HPA + 0x064); + *(volatile u32 *)(DINO_HPA + 0x064) = port & ~3U; /* read value to PCI_IO_DATA */ - return inw(DINO_HPA + 0x06c + (port & 3)); + return le16_to_cpu(*(volatile u16 *)(DINO_HPA + 0x06c + (port & 3U))); } } static inline u32 inl(portaddr_t port) { @@ -293,9 +293,9 @@ static inline u32 inl(portaddr_t port) { return *(volatile u32 *)(port); } else { /* write PCI I/O address to Dino's PCI_CONFIG_ADDR */ - outl(port & ~3U, DINO_HPA + 0x064); + *(volatile u32 *)(DINO_HPA + 0x064) = port; /* read value to PCI_IO_DATA */ - return inl(DINO_HPA + 0x06c + (port & 3)); + return le32_to_cpu(*(volatile u32 *)(DINO_HPA + 0x06c)); } } |