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| author | Anup Patel <apatel@ventanamicro.com> | 2022-06-16 17:28:56 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-06-21 08:44:45 +0530 |
| commit | c6530012d46ed9c9655c426450bfa3aabcc0eadd (patch) | |
| tree | d43a104f4e2d5151ec7c49a118b046aa6d4c8390 /scripts/Kconfiglib/kconfiglib.py | |
| parent | a07402ac9cea19b3af70ed6469bb6d937132a18f (diff) | |
| download | opensbi-c6530012d46ed9c9655c426450bfa3aabcc0eadd.zip opensbi-c6530012d46ed9c9655c426450bfa3aabcc0eadd.tar.gz opensbi-c6530012d46ed9c9655c426450bfa3aabcc0eadd.tar.bz2 | |
lib: utils: Remove CSRs that set/clear an IMSIC interrupt file bits
Based on architecture review committee feedback, the [m|s|vs]seteienum,
[m|s|vs]clreienum, [m|s|vs]seteipnum, and [m|s|vs]clreipnum CSRs are
removed in the latest AIA draft v0.3.0 specification.
(Refer, https://github.com/riscv/riscv-aia/releases/tag/0.3.0-draft.31)
These CSRs were mostly for software convenience and software can always
use [m|s|vs]iselect and [m|s|vs]ireg CSRs to update the IMSIC interrupt
file bits.
We update the IMSIC programming as-per above to match the latest AIA
draft specification.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Diffstat (limited to 'scripts/Kconfiglib/kconfiglib.py')
0 files changed, 0 insertions, 0 deletions