diff options
| author | Ben Zong-You Xie <ben717@andestech.com> | 2025-12-29 15:19:14 +0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2026-02-11 12:14:04 +0530 |
| commit | b27ecec76b8acfece9c28078d02cbc6bc762135c (patch) | |
| tree | 4f792d1fff8cc1f21db663e02a048db3d658cbce /include | |
| parent | 82b0961821e45768a91139b8ec5d7784586aa7f9 (diff) | |
| download | opensbi-master.tar.gz opensbi-master.tar.bz2 opensbi-master.zip | |
Implement a system-wide suspend driver for the Andes AE350 platform.
This driver supports Andes-specific deep sleep (suspend to RAM) and
light sleep (suspend to standby) functionalities via the ATCSMU.
The major differences between deep sleep and light sleep are:
- Power Domain and Resume Path: Deep sleep powers down the core domain.
Consequently, harts waking from deep sleep resume from the reset
vector. Light sleep utilizes clock gating to the core domain; harts
maintain state and resume execution at the instruction immediately
following the WFI instruction.
- Primary Hart Wakeup: In both modes, the primary hart is woken by
UART or RTC alarm interrupts. In deep sleep, the primary hart is
additionally responsible for re-enabling the Last Level Cache (LLC)
and restoring Andes-specific CSRs.
- Secondary Hart Wakeup: In light sleep, secondary harts are woken
by an IPI sent from the primary hart. In deep sleep, they are
woken by an ATCSMU hardware wake-up command. Furthermore,
secondary harts must restore Andes-specific CSRs when returning
from deep sleep.
Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Link: https://lore.kernel.org/r/20251229071914.1451587-6-ben717@andestech.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h b/include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h index ef851b75..5e71fab7 100644 --- a/include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h +++ b/include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h @@ -60,5 +60,6 @@ int atcsmu_set_reset_vector(u64 wakeup_addr, u32 hartid); u32 atcsmu_get_sleep_type(u32 hartid); void atcsmu_write_scratch(u32 value); u32 atcsmu_read_scratch(void); +bool atcsmu_pcs_is_sleep(u32 hartid, bool deep_sleep); #endif |