blob: 718e672e020194bf5b8ef89cb9bd637b327d8122 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
|
;; @file
; Provide FSP API entry points.
;
; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;;
SECTION .text
%include "PushPopRegsNasm.inc"
STACK_SAVED_RAX_OFFSET EQU 8 * 7 ; size of a general purpose register * rax index
;
; Following functions will be provided in C
;
extern ASM_PFX(Loader2PeiSwitchStack)
extern ASM_PFX(FspApiCallingCheck)
;
; Following functions will be provided in ASM
;
extern ASM_PFX(FspApiCommonContinue)
extern ASM_PFX(AsmGetFspInfoHeader)
;----------------------------------------------------------------------------
; FspApiCommon API
;
; This is the FSP API common entry point to resume the FSP execution
;
;----------------------------------------------------------------------------
global ASM_PFX(FspApiCommon)
ASM_PFX(FspApiCommon):
;
; RAX holds the API index
;
;
; Stack must be ready
;
push rax
add rsp, 8
cmp rax, [rsp - 8]
jz FspApiCommon1
mov rax, 08000000000000003h
jmp exit
FspApiCommon1:
;
; Verify the calling condition
;
PUSHA_64
mov rdx, rcx ; move ApiParam to rdx
mov rcx, rax ; move ApiIdx to rcx
call ASM_PFX(FspApiCallingCheck)
cmp rax, 0
jz FspApiCommon2
mov [rsp + STACK_SAVED_RAX_OFFSET], rax
POPA_64
exit:
ret
FspApiCommon2:
POPA_64
cmp rax, 3 ; FspMemoryInit API
jz FspApiCommon3
cmp rax, 6 ; FspMultiPhaseSiInitApiIndex API
jz FspApiCommon3
call ASM_PFX(AsmGetFspInfoHeader)
jmp ASM_PFX(Loader2PeiSwitchStack)
FspApiCommon3:
jmp ASM_PFX(FspApiCommonContinue)
|
