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path: root/UefiCpuPkg/PiSmmCpuDxeSmm/X64
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2018-04-04UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmiStack" with PatchInstructionX86()Laszlo Ersek1-3/+3
2018-04-04UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmbase" with PatchInstructionX86()Laszlo Ersek1-3/+3
2018-04-04UefiCpuPkg/PiSmmCpuDxeSmm: remove *.S and *.asm assembly filesLaszlo Ersek8-1916/+0
2018-01-18UefiCpuPkg/PiSmmCpuDxeSmm: Enable NXE if it's supportedJian J Wang1-1/+11
2018-01-16UefiCpuPkg: Update PiSmmCpuDxeSmm pass XCODE5 tool chainLiming Gao4-20/+40
2018-01-15UefiCpuPkg PiSmmCpuDxeSmm: Fixed #double fault on #page fault for IA32Star Zeng1-49/+1
2017-12-08UefiCpuPkg: PiSmmCpuDxeSmm Add the missing ASM_PFX in nasm codeLiming Gao1-5/+5
2017-12-08UefiCpuPkg PiSmmCpuDxeSmm: SMM profile and static paging mutual exclusionStar Zeng1-3/+10
2017-12-08UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in error caseStar Zeng1-2/+4
2017-11-21UefiCpuPkg: Fix unix style of EOLJian J Wang1-14/+14
2017-11-17UefiCpuPkg/PiSmmCpuDxeSmm: Add SmmMemoryAttribute protocolJian J Wang1-1/+14
2017-10-11UefiCpuPkg/PiSmmCpuDxeSmm: Implement NULL pointer detection for SMM codeJian J Wang1-0/+12
2017-08-28UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definitionStar Zeng1-1/+0
2017-04-07UefiCpuPkg/PiSmmCpuDxeSmm: Consume new APIsJeff Fan1-12/+6
2017-03-01UefiCpuPkg/PiSmmCpuDxeSmm: Add support for PCD PcdPteMemoryEncryptionAddressO...Leo Duran2-34/+39
2016-12-19UefiCpuPkg/PiSmmCpu: Add SMM Comm Buffer Paging Protection.Jiewen Yao1-0/+7
2016-12-16UefiCpuPkg/PiSmmCpuDxeSmm: Fix .S & .asm build failureFeng Tian2-2/+2
2016-12-06UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRR field from PSDMichael Kinney3-6/+3
2016-12-07UefiCpuPkg/PiSmmCpu: Fixed #double fault on #page fault.Jiewen Yao1-1/+48
2016-11-24UefiCpuPkg/PiSmmCpu: Correct exception message.Jiewen Yao1-4/+33
2016-11-18MdeModulePkg/PiSmmCpuDxeSmm: Check RegisterCpuInterruptHandler statusJeff Fan1-1/+3
2016-11-17UefiCpuPkg/PiSmmCpuDxeSmm: TransferApToSafeState() use UINTN paramsMichael Kinney1-9/+9
2016-11-17UefiCpuPkg/PiSmmCpuDxeSmm: Add paging protection.Jiewen Yao9-352/+463
2016-11-15UefiCpuPkg/PiSmmCpuDxeSmm: Decrease mNumberToFinish in AP safe codeJeff Fan1-2/+4
2016-11-15UefiCpuPkg/PiSmmCpuDxeSmm: Place AP to 32bit protected mode on S3 pathJeff Fan1-5/+37
2016-11-15UefiCpuPkg/PiSmmCpuDxeSmm: Put AP into safe hlt-loop code on S3 pathJeff Fan1-1/+28
2016-06-30UefiCpuPkg: fix ASSERT_EFI_ERROR() typosLaszlo Ersek1-1/+1
2016-06-28UefiCpuPkg PiSmmCpuDxeSmm: Convert X64/SmmInit.asm to NASMLiming Gao1-0/+130
2016-06-28UefiCpuPkg PiSmmCpuDxeSmm: Convert X64/SmiException.asm to NASMLiming Gao1-0/+412
2016-06-28UefiCpuPkg PiSmmCpuDxeSmm: Convert X64/SmiEntry.asm to NASMLiming Gao1-0/+177
2016-06-28UefiCpuPkg PiSmmCpuDxeSmm: Update X64/MpFuncs.nasmLiming Gao1-51/+43
2016-06-28UefiCpuPkg PiSmmCpuDxeSmm: Convert X64/MpFuncs.asm to NASMLiming Gao1-0/+204
2016-05-24UefiCpuPkg/PiSmmCpuDxeSmm: Using global semaphores in aligned bufferJeff Fan1-5/+4
2015-11-30UefiCpuPkg/PiSmmCpu: Always set WP in CR0Yao, Jiewen2-2/+2
2015-11-30UefiCpuPkg/PiSmmCpu: Always set RW+P bit for page table by defaultYao, Jiewen2-11/+11
2015-11-27Revert "Always set WP in CR0."Laszlo Ersek4-11/+11
2015-11-26Always set WP in CR0.Yao, Jiewen4-11/+11
2015-11-25Move SmmDebug feature from ASM to C.Yao, Jiewen2-58/+28
2015-11-25Eliminate EFI_IMAGE_MACHINE_TYPE_SUPPORTED.Yao, Jiewen3-16/+70
2015-11-25Correct TSS segment.Yao, Jiewen2-4/+4
2015-10-19UefiCpuPkg: Add PiSmmCpuDxeSmm module X64 filesMichael Kinney12-0/+3324
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