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2018-09-14MdePkg: Update the comments in decshenglei1-1/+1
Correct the directory of a header file in comments. https://bugzilla.tianocore.org/show_bug.cgi?id=1172 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-08-29MdePkg: Add the missing spec version information for header filesshenglei26-7/+87
Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-08-28MdePkg SmBios.h: Add SMBIOS 3.2.0 definitionsStar Zeng1-35/+120
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099 Add SMBIOS 3.2.0 definitions according to www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf. Processor Information (Type 4): - SMBIOSCR00163: add socket LGA2066 - SMBIOSCR00173: add Intel Core i9 - SMBIOSCR00176: add new processor sockets Port Connector Information (Type 8): - SMBIOSCR00168: add USB Type-C System Slots (Type 9): - SMBIOSCR00164: add "unavailable" to current usage field - SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17): - SMBIOSCR00162: add support for NVDIMMs - SMBIOSCR00166: extend support for NVDIMMs and add support for logical memory type - SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memory Speed" - SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, 3D XPoint) IPMI Device Information (Type 38): - SMBIOSCR00171: add SSIF Management Controller Host Interface (Type 42) - SMBIOSCR00175: fix structure data parsing issue V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9. Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-08-22MdePkg/UefiLib: don't special-case EFI_FILE_MODE_CREATE in OpenModeLaszlo Ersek2-50/+9
While reviewing the patch that would land as 768b611136d0 ("MdePkg/UefiLib: introduce EfiOpenFileByDevicePath()", 2018-08-16), Ray pointed out that distinguishing EFI_FILE_MODE_CREATE was wasteful. Per spec, if the file to create exists, then EFI_FILE_MODE_CREATE is ignored by EFI_FILE_PROTOCOL.Open(), and the existent file is opened. Therefore we don't need an attempt to "open-but-not-create" first, and a fallback to "open-and-create-too" second -- that behavior is internal to EFI_FILE_PROTOCOL.Open(). Remove the special-casing of EFI_FILE_MODE_CREATE. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Suggested-by: Ruiyu Ni <ruiyu.ni@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1074 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-08-16MdePkg/UefiLib: introduce EfiOpenFileByDevicePath()Laszlo Ersek3-0/+316
The EfiOpenFileByDevicePath() function centralizes functionality from - MdeModulePkg/Universal/Disk/RamDiskDxe - NetworkPkg/TlsAuthConfigDxe - SecurityPkg/VariableAuthenticated/SecureBootConfigDxe - ShellPkg/Library/UefiShellLib unifying the implementation and fixing various bugs. (Ray suggested that we eliminate the special handling of EFI_FILE_MODE_CREATE in the "OpenMode" input parameter as well. We plan to implement that separately, under <https://bugzilla.tianocore.org/show_bug.cgi?id=1074>.) Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Roman Bacik <roman.bacik@broadcom.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Star Zeng <star.zeng@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1008 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-08-15MdePkg Cper.h: Add generic error macros for ARM platformedk2-stable201808Ming Huang1-0/+3
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org>
2018-08-06MdePkg/BaseLib: Add an additional check within AsciiStriCmpRuiyu Ni1-1/+1
This commit adds an addtional check in AsciiStriCmp. It explicitly checks the end of the sting pointed by 'SecondString' to make the code logic easier for reading and to prevent possible mis-reports by static code checkers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao Wu <Hao.a.wu@intel.com>
2018-08-01MdePkg FirmwareManagement.h: Fix code style issueStar Zeng1-4/+4
Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Hess Chen <hesheng.chen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2018-07-31MdePkg/SmmMemLib: Avoid possible NULL ptr dereferenceHao Wu1-1/+1
Within function SmmMemLibInternalGetUefiMemoryAttributesTable(), add a check to avoid possible null pointer dereference. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2018-07-26MdePkg/SmmMemLib: Check EFI_MEMORY_RO in UEFI mem attrib table.Jiewen Yao2-3/+59
It treats the UEFI runtime page with EFI_MEMORY_RO attribute as invalid SMM communication buffer. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-07-26MdePkg/SmmMemLib: Check for untested memory in GCDJiewen Yao2-5/+92
It treats GCD untested memory as invalid SMM communication buffer. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-07-09MdePkg/BaseLib: Add bit field population calculating methodsTomas Pilar (tpilar)2-0/+142
Hopefully this should tidy the conversion warnings. ---- Add 32-bit and 64-bit functions that count number of set bits in a bitfield using a divide-and-count method. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Tomas Pilar <tpilar@solarflare.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2018-06-28MdePkg: IORT Specification Rev D updatesSami Mujawar1-4/+6
Updated IORT structure definitions to conform to the IO Remapping Table, Platform Design Document, Revision D, March 2018. The following structures have been updated: 1. SMMUv3 - fix on proximity node. 2. PMCG - added page 1 support. 3. Root complex node - added DMA mask (memory address size limit). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-06-28MdePkg: SMMUv3 updates for IORT table definitionsSami Mujawar1-1/+10
Updated the IORT SMMUv3 Node structure and flags to match the IO Remapping Table, Platform Design Document, Revision C dated 15 MAY 2017. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-06-28MdePkg: Clean up source filesLiming Gao729-15717/+15717
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-27MdePkg: TpmPtp: Add CapCRBIdleBypass definitionZhang, Chao B1-2/+3
Add CapCRBIdleBypass definition to interface ID register. It complies with existing register Cc: Long Qin <qin.long@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Long Qin <qin.long@intel.com>
2018-06-26MdePkg/PerformanceLib.h: Add new Perf macrosBi, Dandan4-3/+477
1. Add new Perf macros for performance measurement and related APIs and definitions in Performance library class. 2. Update NULL performance library instance in MdePkg. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-06-19MdePkg/IndustryStandard/Ipmi: Use union for bitmap fieldsHao Wu5-536/+1076
This commit enhances the bitmap fields defined in the IPMI header files, union types will be used to provide the users with both the individual bitmap access and the whole byte/word access. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-06-19MdePkg/IndustryStandard/Ipmi: Update IPMI header filesHao Wu6-60/+789
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=814 This commit updates the IPMI related header files. Cc: Younas Khan <pmdyounaskhan786@gmail.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-06-12MdePkg UefiLib: Use comparison logic to check UINTN parameterLiming Gao2-7/+7
Commit d2aafe1e410c80d1046f2d1e743055882ead8489 changes the input parameter from BOOLEAN to UINTN. Its comparison logic should be updated. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-06-11MdePkg/BaseIoLibIntrinsic: make BaseIoLibIntrinsic safe for ArmVirt/KVMArd Biesheuvel8-0/+1400
KVM on ARM refuses to decode load/store instructions used to perform I/O to emulated devices, and instead relies on the exception syndrome information to describe the operand register, access size, etc. This is only possible for instructions that have a single input/output register (as opposed to ones that increment the offset register, or load/store pair instructions, etc). Otherwise, QEMU crashes with the following error error: kvm run failed Function not implemented R00=01010101 R01=00000008 R02=00000048 R03=08000820 R04=00000120 R05=7faaa0e0 R06=7faaa0dc R07=7faaa0e8 R08=7faaa0ec R09=7faaa088 R10=000000ff R11=00000080 R12=ff000000 R13=7fccfe08 R14=7faa835f R15=7faa887c PSR=800001f3 N--- T svc32 QEMU: Terminated and KVM produces a warning such as the following in the kernel log kvm [17646]: load/store instruction decoding not implemented The IoLib implementation provided by MdePkg/Library/BaseIoLibIntrinsic is based on C code, and when LTO is in effect, the MMIO accesses could be merged with, e.g., manipulations of the loop counter, producing opcodes that KVM does not support for emulated MMIO. So let's add a special ArmVirt flavor of this library that implements that actual load/store operations in assembler, ensuring that the instructions involved can be emulated by KVM. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-06-07MdePkg: Remove X86 ASM and S filesLiming Gao308-15375/+8
NASM has replaced ASM and S files. 1. Remove ASM from all modules. 2. Remove S files from the drivers only. 3. https://bugzilla.tianocore.org/show_bug.cgi?id=881 After NASM is updated, S files can be removed from Library. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2018-06-05MdePkg UefiLib: Fix in EfiLocateProtocolBuffer()Star Zeng1-0/+4
Free HandleBuffer for error path in EfiLocateProtocolBuffer(). Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2018-06-05MdePkg/UefiRuntimeLib: Do not allow to be linked by DXE driverRuiyu Ni1-2/+2
When UefiRuntimeLib links to a DXE driver, its constructor still registers a Virtual Address Change event. The event callback will get called when RT.SetVirtualAddressMap() is called from OS. But when the driver is a DXE driver, the memory occupied by the callback function might be zeroed or used by OS since the BS type memory is free memory when entering to RT phase. The patch reverts commit 97511979b4fdd84cf7cd51e43c22dc03e79bd4f3 "MdePkg/UefiRuntimeLib: Support more module types." It makes sure that DXE driver cannot link to this library. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-05-29MdePkg/DxeServicesLib: introduce AllocatePeiAccessiblePages routineArd Biesheuvel4-2/+155
Add a routine to DxeServicesLib that abstracts the allocation of memory that should be accessible by PEI after resuming from S3. We will use it to replace open coded implementations that limit the address to < 4 GB, which may not be possible on non-Intel systems that have no 32-bit addressable memory at all. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-05-28MdePkg: Update MmSwDispatch.h's references to SmmSw2Dispatch.Marvin.Haeuser@outlook.com1-3/+3
MmSwDispatch.h current refers to the deprecated SmmSw2Dispatch protocol. Replace those references with the new MmSwDispatch name. V2: - Do not change the copyright date as requested. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-05-28MdePkg/Hpet: Add Event Timer Block ID definition.Marvin.Haeuser@outlook.com1-0/+16
This patch adds the HPET Event Timer Block ID definition that can be found in the IA-PC HPET Specification, section 3.2.4. V2: - Do not change the copyright date as requested. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-05-24MdePkg/TcgStorage*.h: Fixed ECC reported issues.Eric Dong2-5/+5
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2018-05-23MdePkg/IndustryStandard: Add header file for SPMI ACPI tableHao Wu1-0/+104
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=840 Add the header file for Service Processor Management Interface ACPI table definition. Cc: Younas Khan <pmdyounaskhan786@gmail.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2018-05-23MdePkg UefiLib: Fix XCODE5 varargs warningLiming Gao2-2/+2
https://bugzilla.tianocore.org/show_bug.cgi?id=741 Change GetBestLanguage() parameter type from BOOLEAN to UINTN Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Steven Shi <steven.shi@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-05-21MdePkg/SmmPeriodicSmiLib: Get Periodic SMI Context More RobustlyRuiyu Ni1-23/+15
The PeriodicSmiDispatchFunction() in SmmPeriodicSmiLib may assert with "Bad CR signature". Currently, the SetActivePeriodicSmiLibraryHandler() function (invoked at the beginning of the PeriodicSmiDispatchFunction() function) attempts to locate the PERIODIC_SMI_LIBRARY_HANDLER_CONTEXT structure pointer for the current periodic SMI from a given EFI_SMM_PERIODIC_TIMER_REGISTER_CONTEXT (RegiserContext) structure pointer (using the CR macro). The RegisterContext structure pointer passed to the PeriodicSmiDispatchFunction() is assumed to point to the same RegisterContext structure address given to the SmmPeriodicTimerDispatch2 protocol Register() API in PeriodicSmiEnable(). However, certain SmmPeriodicTimerDispatch2 implementation may copy the RegisterContext to a local buffer and pass that address as the context to PeriodicSmiDispatchFunction() in which case usage of the CR macro to find the parent structure base fails. The patch uses the LookupPeriodicSmiLibraryHandler() function to find the PERIODIC_SMI_LIBRARY_HANDLER_CONTEXT structure pointer. This works even in this scenario since the DispatchHandle returned from the SmmPeriodicTimerDispatch2 Register() function uniquely identifies that registration. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-05-17MdePkg/UefiLib: Add 'OUT' decorator where necessary.Marvin.Haeuser@outlook.com2-18/+18
The functions AddUnicodeString() and AddUnicodeString2() might return a new value into their parameter UnicodeStringTable, hence add the appropiate 'OUT' decorator. V2: Update FrameworkUefiLib as well. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-05-17MdePkg/PeiServicesLib: Decorate 'PpiDescriptor' as OPTIONAL for LocatePpi().Marvin.Haeuser@outlook.com2-4/+4
The UEFI PI specification defines PpiDescriptor to be OPTIONAL for the LocatePpi PEI Service. This patch reflects this in the function declaration and definition of the corresponding PeiServices library function. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-05-17MdePkg/TcgStorage*.h: Add referenced spec information.Eric Dong2-2/+21
Add link and version info for the referenced spec. Cc: Jiewen yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-05-07MdePkg: Add Feature definitions added in pyrite 2.0 spec.Eric Dong2-0/+56
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-05-02MdePkg/DevicePathToText: Fix iSCSI.Lun byte order issueRuiyu Ni1-6/+8
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-04-25MdePkg FirmwareManagement.h: Fix typo EFI_SECURITY_VIOLATIOStar Zeng1-6/+7
Fix typo EFI_SECURITY_VIOLATIO to EFI_SECURITY_VIOLATION. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2018-04-17MdePkg/Library/BaseCpuLib: Enable VS2017/ARM64 buildsPete Batard3-3/+84
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-04-17MdePkg/Library/BaseSynchronizationLib: Enable VS2017/ARM64 buildsPete Batard2-1/+207
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-04-13MdePkg/Include/Protocol/Tls.h: pack structures from the TLS RFCLaszlo Ersek1-0/+10
The structures defined in RFC 5246 are not to have any padding between fields or at the end; use the "pack" pragma as necessary. Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=915 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Long Qin <qin.long@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2018-04-13MdePkg DxeHstiLib: Fix ErrorString pointer incorrectly calculatedStar Zeng1-2/+2
Fix ErrorString pointer is incorrectly calculated in InternalHstiIsValidTable(). Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2018-04-04MdePkg/BaseLib: add PatchInstructionX86()Laszlo Ersek3-0/+147
Some edk2 modules generate X86 machine code at module execution time by: - compiling "template" code with NASM at module build time, - linking the object code into the module, - and patching the immediate (constant) operands of some instructions when the module is executed. Add a helper function to BaseLib so that the C code performing the patching is easier to read and maintain. The implementation in this patch is taken mainly from Mike Kinney's mailing list messages at <http://mid.mail-archive.com/E92EE9817A31E24EB0585FDF735412F5B895C360@ORSMSX113.amr.corp.intel.com>, <http://mid.mail-archive.com/E92EE9817A31E24EB0585FDF735412F5B898BF66@ORSMSX112.amr.corp.intel.com>. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-04-04MdePkg/BaseLib.h: state preprocessing conditions in comments after #endifsLaszlo Ersek1-13/+11
"#endif" preprocessing directives near the top of "BaseLib.h" helpfully repeat the preprocessing conditions from their matching "#if", "#ifdef", and "#ifndef" directives. This practice has been less followed recently; supplement the missing comments. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-03-22MdePkg/Tls1.h: Add TLS record header length and max payload length.Jiaxin Wu1-1/+15
Cc: Karunakar P <karunakarp@amiindia.co.in> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Ye Ting <ting.ye@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Karunakar p <karunakarp@amiindia.co.in> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
2018-03-20MdePkg BaseStackCheckLib: Correct style of file headerLiming Gao1-5/+2
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Bi Dandan <dandan.bi@intel.com>
2018-03-20MdePkg/Library/BaseLib/AArch64: Comment style harmonizationPete Batard2-94/+98
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-03-19MdePkg/Include: Add VA list support for VS2017/ARM64Pete Batard1-4/+3
We need to explicitly call the built-in __va_start() for ARM64, otherwise the variable parameters are not properly enqueued for the next function calls. Also do the same for ARM, as as it doesn't harm us. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-03-19MdePkg/Library/BaseLib: Enable VS2017/ARM64 buildsPete Batard8-0/+378
Required GCC assembly files are converted for the MSFT assembler Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-03-19MdePkg: Disable some Level 4 warnings for VS2017/ARM64Pete Batard1-2/+51
We disable the exact same warnings as IA32 and X64. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-03-03MdePkg/DevicePathFromText: Fix byte orders of iSCSI.LunRuiyu Ni1-1/+3
Per UEFI spec, iSCSI.Lun is a 8-byte array with byte #0 in the left. It means "0102030405060708" should be converted to: UINT8[8] = {01, 02, 03, 04, 05, 06, 07, 08} or UINT64 = {0807060504030201} Today's implementation wrongly uses the reversed order. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jie Lin <jie.lin@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com>
generated by cgit v1.1 at 2024-11-13 12:17:42 +0000