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2019-08-13MdePkg: Add MmAccess and MmControl definition.Marc W Chen3-0/+251
EFI MmAccess and MmControl PPIs are defined in the PI 1.5 specification. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2023 Signed-off-by: Marc W Chen <marc.w.chen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-08-09UefiCpuPkg|MdePkg: Move Register/ folder to MdePkg/Include/Ni, Ray32-0/+53560
The patch moves all files under UefiCpuPkg/Include/Register/ to MdePkg/Include/Register using following detailed approaches: 1. Move UefiCpuPkg/Include/Register/Amd/ to MdePkg/Include/Register/Amd folder. 2. Move remaining in UefiCpuPkg/Include/Register/ to MdePkg/Include/Register/Intel folder. 3. Create wrapper header files under UefiCpuPkg/Include/Register/ to include the accordingly files in MdePkg/Include/Register/Intel. This is to avoid build break because code in other repos like edk2-platform includes the file from UefiCpuPkg. The wrapper header files will be removed after all consumers code is updated. Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Eric Dong <eric.dong@intel.com>
2019-08-09MdePkg/Cpuid.h: Move Cpuid.h from UefiCpuPkg to MdePkgNi, Ray1-0/+3997
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2008 MdeModulePkg/DxeIpl needs to get CPUID output for CPU 5-level paging capability detection. In order to use the macros/structures defined in UefiCpuPkg/Include/Register/Cpuid.h, the patch adds Intel/Cpuid.h to MdePkg/Include/Register/ directory and updates Cpuid.h in UefiCpuPkg to include the new one in MdePkg. Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Eric Dong <eric.dong@intel.com>
2019-08-06MdePkg/X64/ProcessorBind.h: Fix EmulatorPkg X64 XCODE5Michael D Kinney1-2/+2
https://bugzilla.tianocore.org/show_bug.cgi?id=2046 Make sure all libs that should be dynamically linked are dynamically linked when XCODE5 compiler is used. A previous change introduced the following pragma: #pragma GCC visibility push (hidden) When the EmulatorPkg is built using XCODE5 toolchain for X64, this pragma is included and it generates a linker error when building the Unix Host module. This change uses !defined(__APPLE__) to prevent the use of this pragma when building EmulatorPkg/Unix/Host. Cc: Liming Gao <liming.gao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
2019-07-31MdePkg: Add PI 1.5 SmramMemoryReserve HOB fileChen, Marc W2-0/+48
This is a special GUID extension Hob to describe SMRAM memory regions Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2020 Signed-off-by: Marc W Chen <marc.w.chen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-07-31MdePkg/PciExpress21.h: Fix the PCI industry standard register definesJaveed, Ashraf1-3/+36
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2007 The following two PCI Capability Structure registers are updated as per the PCI Base Specification Revision 4:- (1) The PCI Device capability register 2(PCI_REG_PCIE_DEVICE_CAPABILITY2) needs to be upgraded for the PCI features like - LN system CLS (LnSystemCLS), 10b Tag completer/requester register fields (TenBitTagCompleterSupported, TenBitTagRequesterSupported), Emergency power reduction support and initialization requirement (EmergencyPowerReductionSupported, EmergencyPowerReductionInitializationRequired), and FRS support (FrsSupported ). (2) The PCI Device Control register 2(PCI_REG_PCIE_DEVICE_CONTROL2) needs to be upgraded for the - Emergency power reduction request enabling (EmergencyPowerReductionRequest), and also the 10b Extended Tag enabling (TenBitTagRequesterEnable). The following two are defined as per the PCI Express Base Specification Revision 2.1:- (1) Defined macro definitions for all the ranges of Maximum Payload Sizes and Maximum Read Request Sizes register fields (2) Defined macro definitions for all the ranges of Completion Timeout value. Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-07-29MdePkg/UefiDebugLibStdErr: Add destructor to CloseEventXu, Wei62-0/+24
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2012 When driver is unloaded, the ExitBootSerivesEvent must be closed at the same time. Otherwise exception will occur when ExitBootServices. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Wei6 Xu <wei6.xu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-07-29MdePkg/UefiDebugLibDebugPortProtocol: Add destructor to CloseEventXu, Wei62-0/+24
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2012 When driver is unloaded, the ExitBootSerivesEvent must be closed at the same time. Otherwise exception will occur when ExitBootServices. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Wei6 Xu <wei6.xu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-07-29MdePkg/UefiDebugLibConOut: Add destructor to CloseEventXu, Wei62-0/+24
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2012 When driver is unloaded, the ExitBootSerivesEvent must be closed at the same time. Otherwise exception will occur when ExitBootServices. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Wei6 Xu <wei6.xu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-07-17MdePkg/BaseLib: Base64Decode(): don't declare variables in nested blocksLaszlo Ersek1-4/+3
The EDK II C Coding Standards Specification (v2.20) strongly discourages variable declarations in nested block scope: 5 Source Files 5.4 Code File Structure 5.4.1 Scoping Rules 5.4.1.1 Scope > Block (local) Scope > > [...] > > Data declarations may follow the opening brace of a compound statement, > regardless of nesting depth, and before any code generating statements > have been entered. Other than at the outermost block of a function body, > this type of declaration is strongly discouraged. Hoist such variable declarations in Base64Decode() to the outermost function scope. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Fixes: 35e242b698cdc6205e99a6d6a188bf27fecf9fb4 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1980 Reported-by: Zhichao Gao <zhichao.gao@intel.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Tested-by: Philippe Mathieu-Daude <philmd@redhat.com>
2019-07-16MdePkg/BaseLib: rewrite Base64Decode()Laszlo Ersek1-2/+247
Rewrite Base64Decode() from scratch, due to reasons listed in the second reference below. Implement Base64Decode() according to the specification added in the previous patch. The decoder scans the input buffer once, it has no inner loop(s), and it spills each output byte as soon as the output byte is complete. The intent is to only strengthen the checks (sanity and input) relative to the previous implementation, hence the MAX_ADDRESS checks are reinstated. Cc: Liming Gao <liming.gao@intel.com> Cc: Marvin Häuser <mhaeuser@outlook.de> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1891 Ref: http://mid.mail-archive.com/c495bd0b-ea4d-7206-8a4f-a7149760d19a@redhat.com Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Tested-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> [lersek@redhat.com: add last para to commit msg per talks w/ Marvin & Phil]
2019-07-16MdePkg/BaseLib: re-specify Base64Decode(), and add temporary stub implLaszlo Ersek2-220/+172
Rewrite Base64Decode() from scratch, due to reasons listed in the second reference below. As first step, redo the interface contract, and replace the current implementation with a stub that asserts FALSE, then fails. Cc: Liming Gao <liming.gao@intel.com> Cc: Marvin Häuser <mhaeuser@outlook.de> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1891 Ref: http://mid.mail-archive.com/c495bd0b-ea4d-7206-8a4f-a7149760d19a@redhat.com Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-07-16MdePkg: Add new MM MP Protocol definition.Eric Dong3-0/+352
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1937 EFI MM MP Protocol is defined in the PI 1.5 specification. The MM MP protocol provides a set of functions to allow execution of procedures on processors that have entered MM. This protocol has the following properties: 1. The caller can invoke execution of a procedure on a processor, other than the caller, that has also entered MM. Supports blocking and non-blocking modes of operation. 2. The caller can invoke a procedure on multiple processors. Supports blocking and non-blocking modes of operation. Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2019-07-12MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level pagingRay Ni1-1/+2
5-level paging is documented in white paper: https://software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf Commit f8113e25001e715390127f23e2197252cbd6d1a2 changed Cpuid.h already. This patch updates IA32_CR4 structure to include LA57 field. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> (cherry picked from commit 7c5010c7f88b790f4524c4a5311819e3af5e2752)
2019-07-12Revert "MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level paging"Ray Ni1-2/+1
This reverts commit 7c5010c7f88b790f4524c4a5311819e3af5e2752. Commit 7c5010c7f8 MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level paging technically breaks the EDKII development process documented in https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Development-Process and Maintainers.txt in EDKII repo root directory. The voilation is commit 7c5010c7f8 doesn't have a Reviewed-by or Acked-by from MdePkg maintainers. Signed-off-by: Ray Ni <ray.ni@intel.com>
2019-07-10MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level pagingRay Ni1-1/+2
5-level paging is documented in white paper: https://software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf Commit f8113e25001e715390127f23e2197252cbd6d1a2 changed Cpuid.h already. This patch updates IA32_CR4 structure to include LA57 field. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
2019-07-04Revert "MdePkg/Protocol/Hash: introduce GUID for SM3"Laszlo Ersek1-5/+0
This reverts commit 49c1e683c452f68c7315454280d81449f7d94d2b. The reason is that said commit had not been reviewed by MdePkg maintainers, before it was pushed. Cc: Imran Desai <imran.desai@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1781 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2019-07-03MdePkg/Protocol/Hash: introduce GUID for SM3Imran Desai1-0/+5
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1781 EDK2 Support for SM3 digest algorithm is needed to enable TPM with SM3 PCR banks. This digest algorithm is part of the China Crypto algorithm suite. This integration has dependency on the openssl_1_1_1b integration into edk2. This patch adds GUID for SM3 digest algorithm. Signed-off-by: Imran Desai <imran.desai@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: jiewen.yao@intel.com
2019-06-21MdePkg: Add Generic Initiator Affinity Structure definitions to SRATKrzysztof Koch1-1/+10
Add Generic Initiator Affinity Structure to the list of recognised System Resource Affinity Table (SRAT) structure types. Add definitions for Device Handle Types inside the Generic Initiator Affinity Structure. References: - ACPI 6.3 January 2019, Table 5-78 Signed-off-by: Krzysztof Koch <krzysztof.koch@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-05-15MdePkg: Merge TianoCustomDecompress algorithm intoDandan Bi7-17/+366
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1722 We plan to merge the BaseUefiTianoCustomDecompressLib in MdeModulePkg into the BaseUefDecompressLib in MdePkg. In order to reduce the duplicated codes and maintain easily. This patch adds a new fdf file in BaseUefDecompressLib (BaseUefiTianoCustomDecompressLib.inf) to keep the same functionality and usage model with the one in MdeModulePkg, and then update consumer to use this new one one and remove the one in MdeModulePkg finally. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-05-15MdePkg: Add ACPI 6.3 header fileKrzysztof Koch2-1/+2948
The patch includes the following ACPI 6.3 updates: 1. Reserve CRAT and CDIT table names in ACPI 6.3 header. - ACPI 6.3 January 2019, Table 5-30 - Mantis ID 1883 (https://mantis.uefi.org/mantis/view.php?id=1883) 2. Add new processor structure flags in PPTT. - ACPI 6.3 January 2019, Section 5.2.29 - Mantis ID 1870 (https://mantis.uefi.org/mantis/view.php?id=1870) - Mantis ID 1934 (https://mantis.uefi.org/mantis/view.php?id=1934) 3. Add SPE support to MADT. - ACPI 6.3 January 2019, Table 5-60 - Mantis ID 1934 (https://mantis.uefi.org/mantis/view.php?id=1934) 4. Add 'Hot-plug Capable' flag to APIC. - ACPI 6.3 January 2019, Table 5-44, Table 5-47 & Table 5-58 - Mantis ID 1948 (https://mantis.uefi.org/mantis/view.php?id=1948) 5. Add CNTHV timer to GTDT. - ACPI 6.3 January 2019, Section 5.2.24 - Mantis ID 1851 (https://mantis.uefi.org/mantis/view.php?id=1851) 6. Add 'Trigger Order' to Platform Communication Channel Identification Structure. - ACPI 6.3 January 2019, Section 5.2.28 - Mantis ID 1867 (https://mantis.uefi.org/mantis/view.php?id=1867) 7. Add Generic Initiator Affinity Structure to SRAT. - ACPI 6.3 January 2019, Section 5.2.16.6 - Mantis ID 1904 (https://mantis.uefi.org/mantis/view.php?id=1904) 8. Add 'HMAT Enhancements'. - ACPI 6.3 January 2019, Section 5.2.27 - Mantis ID 1914 (https://mantis.uefi.org/mantis/view.php?id=1914) - Mantis ID 1959 (https://mantis.uefi.org/mantis/view.php?id=1959) 9. Fix generic address structure definition to include all address space ID keywords. - ACPI 6.3 January 2019, Table 5-25 - Mantis ID 1965 (https://mantis.uefi.org/mantis/view.php?id=1965) 10. Make Acpi63.h the latest ACPI definition. Signed-off-by: Krzysztof Koch <krzysztof.koch@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2019-04-30MdePkg/BaseLib: Use PcdSpeculationBarrierTypeMichael D Kinney2-2/+7
Use PcdSpeculationBarrierType in the x86 implementation of SpeculationBarrier() to select between AsmLfence(), AsmCpuid(), and no operation. Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Brian J. Johnson <brian.johnson@hpe.com>
2019-04-30MdePkg: Add PcdSpeculationBarrierTypeMichael D Kinney2-0/+17
Add gEfiMdePkgTokenSpaceGuid.PcdSpeculationBarrierType that uses the PCD type FixedAtBuild. This performs a build time selection for the type of speculation barrier to use in the BaseLib function SpeculationBarrier(). The recommended speculation barrier for x86 is LFENCE and this is the default value for this PCD. x86 CPUs that do not support LFENCE must select one of the other supported values which includes CPUID and nothing. Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Brian J. Johnson <brian.johnson@hpe.com>
2019-04-28MdePkg/UefiDebugLibStdErr: make global variable staticZhichao Gao1-1/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1740 Add a 'static' storage-class specifier to the global variables that only used in a single file to minimize the name collisions. This is only for the variable named 'mExitBootServicesEvent'. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-28MdePkg/UefiDebugLibDebugPortProtocol: make global variable staticZhichao Gao1-1/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1740 Add a 'static' storage-class specifier to the global variables that only used in a single file to minimize the name collisions. This is only for the variable named 'mExitBootServicesEvent'. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-28MdePkg/UefiDebugLibConOut: make global variable staticZhichao Gao1-1/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1740 Add a 'static' storage-class specifier to the global variables that only used in a single file to minimize the name collisions. This is only for the variable named 'mExitBootServicesEvent'. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-28MdePkg: Removed IPF related codeShenglei Zhang10-5538/+0
A previous commit(3cb0a311cb7e747d7be5c5076d0fff76ad256d2b) didn't clean all IPF contents. So this change removes the rest contents. https://bugzilla.tianocore.org/show_bug.cgi?id=1560 v2: Withdraw the removal of Mps.h. It is written in Mps.h that MPS only was included to support Itanium-based platform power on. But we found MPS is not so relevant to Itanium architecture. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-28MdePkg/PeiServicesLib.c: Change comments of PeiServicesResetSystem2Zhichao Gao1-4/+2
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1460 Refer to Uefi spec 2.8, the ResetData is valid while ResetStatus is EFI_SUCCESS regardless of the ResetType is EfiResetPlatformSpecific or not. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael Turner <Michael.Turner@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-28MdePkg/PeiServicesLib.h: Change comments of PeiServicesResetSystem2Zhichao Gao1-4/+2
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1460 Refer to Uefi spec 2.8, the ResetData is valid while ResetStatus is EFI_SUCCESS regardless of the ResetType is EfiResetPlatformSpecific or not. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael Turner <Michael.Turner@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-28MdePkg/PiPeiCis.h: Change comments of EFI_PEI_RESET2_SYSTEMZhichao Gao1-4/+2
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1460 Refer to Uefi spec 2.8, the ResetData is valid while ResetStatus is EFI_SUCCESS regardless of the ResetType is EfiResetPlatformSpecific or not. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael Turner <Michael.Turner@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-28MdePkg/UefiSpec.h: Change comments of EFI_RESET_SYSTEMZhichao Gao1-5/+2
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1460 Refer to Uefi spec 2.8, the ResetData is valid while ResetStatus is EFI_SUCCESS regardless of the ResetType is EfiResetPlatformSpecific or not. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael Turner <Michael.Turner@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-24MdePkg/PiFirmwareFile: fix undefined behavior in FFS_FILE_SIZELaszlo Ersek1-2/+9
Accessing "EFI_FFS_FILE_HEADER.Size", which is of type UINT8[3], through a (UINT32*), is undefined behavior. Fix it by accessing the array elements individually. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=1710 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2019-04-24MdePkg/PiFirmwareFile: fix undefined behavior in SECTION_SIZELaszlo Ersek1-2/+9
RH covscan justifiedly reports that accessing "EFI_COMMON_SECTION_HEADER.Size", which is of type UINT8[3], through a (UINT32*), is undefined behavior: > Error: OVERRUN (CWE-119): > edk2-89910a39dcfd/OvmfPkg/Sec/SecMain.c:178: overrun-local: Overrunning > array of 3 bytes at byte offset 3 by dereferencing pointer > "(UINT32 *)((EFI_COMMON_SECTION_HEADER *)(UINTN)Section)->Size". > # 176| Section = (EFI_COMMON_SECTION_HEADER*)(UINTN) CurrentAddress; > # 177| > # 178|-> Size = SECTION_SIZE (Section); > # 179| if (Size < sizeof (*Section)) { > # 180| return EFI_VOLUME_CORRUPTED; Fix this by accessing the array elements individually. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=1710 Issue: scan-1007.txt Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2019-04-24MdePkg/PiFirmwareFile: express IS_SECTION2 in terms of SECTION_SIZELaszlo Ersek1-3/+3
The IS_SECTION2() function-like macro duplicates the SECTION_SIZE() calculation, just to compare the computed size against 0xFFFFFF. Invoke SECTION_SIZE() instead; only preserve the comparison. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=1710 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2019-04-24MdePkg/BaseLib: Remove support of INTEL tool chainShenglei Zhang1-187/+7
As Intel tool chain will be removed, support of INTEL tool chain should be removed first. https://bugzilla.tianocore.org/show_bug.cgi?id=1666 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit dd611bfeaac249cebb6c12ffdcbbf510f8ed1980)
2019-04-24MdePkg/BaseIoLibIntrinsic: Remove IoLibIcc.cShenglei Zhang3-212/+0
As ICC tool chain will be removed, IoLibIcc.c should also be removed. https://bugzilla.tianocore.org/show_bug.cgi?id=1666 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 9b5be294b93f7ff7fe1bcafdc3c57016f58ee4e8)
2019-04-22MdePkg/UefiDebugLibStdErr: Make it runtime safeAaron Antone3-57/+145
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1416 After ExitBootServices, some pointer would be invalid such as the Protocol pointer and gST. The function depend on those should be prevent. So disable the related function while after ExitBootServices. Change the gST to a internal one, because there will be a cycle consume between UefiBootServicesTableLib and DebugLib due to the library constructors. Also remove the SMM support for this instance. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael Turner <Michael.Turner@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-22MdePkg/UefidebugLibConOut: Make it runtime safeAaron Antone3-58/+147
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1416 After ExitBootServices, some pointer would be invalid such as the Protocol pointer and gST. The function depend on those should be prevent. So disable the related function while after ExitBootServices. Change the gST to a internal one, because there will be a cycle consume between UefiBootServicesTableLib and DebugLib due to the library constructors. Also remove the SMM support for this instance. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael Turner <Michael.Turner@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-22MdePkg/UefiDebugLibDebugPortProtocol: Make it runtime safeAaron Antone3-72/+163
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1416 After ExitBootServices, some pointer would be invalid such as the Protocol pointer and gBS. The function depend on those should be prevent. So disable the related function while after ExitBootServices. Change the gBS to a internal one, because there will be a cycle consume between UefiBootServicesTableLib and DebugLib due to the library constructors. Also remove the SMM support for this instance. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael Turner <Michael.Turner@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-14MdePkg/UefiBaseType.h: treat EBC as a non-native machine typeArd Biesheuvel1-3/+3
Instead of classifying EBC as a supported machine type and have special handling in DXE core for loading EBC images, make it a foreign type and rely on the EDK2 PE/COFF image emulator protocol to claim the image when the DXE core finds that it cannot be supported natively. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2019-04-15MdePkg/BaseLib: Remove LongJump.c and SetJump.cShenglei Zhang3-171/+2
MdePkg BaseLib still uses the inline X86 assembly code in C code files.For now, inline SetJump/LongJump() can be removed. https://bugzilla.tianocore.org/show_bug.cgi?id=1163 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-09MdePkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney1554-10774/+1554
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-03MdePkg/BaseMemoryLibSse2: Remove .S files for IA32 and X64 archShenglei Zhang23-1417/+0
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-03MdePkg/BaseMemoryLibRepStr: Remove .S files for IA32 and X64 archShenglei Zhang23-1180/+0
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-03MdePkg/BaseMemoryLibOptPei: Remove .S files for IA32 and X64 archShenglei Zhang23-1173/+0
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-03MdePkg/BaseMemoryLibOptDxe: Remove .S files for IA32 and X64 archShenglei Zhang23-1222/+0
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-03MdePkg/BaseMemoryLibMmx: Remove .S files for IA32 and X64 archShenglei Zhang23-1290/+0
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-03MdePkg/BaseLib: Remove .S files for IA32 and X64 archShenglei Zhang39-2412/+0
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-03MdePkg/BaseCpuLib: Remove .S files for IA32 and X64 archShenglei Zhang3-73/+0
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 v2: Remove CpuSleep.nasm| GCC and CpuFlushTlb.nasm| GCC in X64 arch in BaseCpuLib.inf. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-02MdePkg/UefiDebuglibDebugPortProtocol: Add new APIsBret Barkelew1-5/+101
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395 Add new APIs' implementation (DebugVPrint, DebugBPrint) in the DebugLib instance. These APIs would expose print routines with VaList parameter and BaseList parameter. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael Turner <Michael.Turner@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
generated by cgit v1.1 at 2024-08-01 03:10:10 +0000