summaryrefslogtreecommitdiff
path: root/IntelSiliconPkg/IntelSiliconPkg.dec
AgeCommit message (Collapse)AuthorFilesLines
2019-06-25Remove IntelSiliconPkg that has been moved to edk2-platform repoLiming Gao1-80/+0
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1890 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
2019-04-09IntelSiliconPkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney1-7/+1
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
2018-10-25IntelSiliconPkg VTdDxe: Report status code for VTd errorStar Zeng1-0/+6
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1273 Current code only uses DEBUG() for VTd error. This patch updates to also report status code for VTd error. Test done: Created case that has VTd error and confirmed the error status code could be reported as expected. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2018-10-25IntelSiliconPkg VTdDxe: Option to force no early access attr requestStar Zeng1-0/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1272 To have high confidence in usage for platform, add option (BIT2 of PcdVTdPolicyPropertyMask) to force no IOMMU access attribute request recording before DMAR table is installed. Check PcdVTdPolicyPropertyMask BIT2 before RequestAccessAttribute() and ProcessRequestedAccessAttribute(), then RequestAccessAttribute(), ProcessRequestedAccessAttribute() and mAccessRequestXXX variables could be optimized by compiler when PcdVTdPolicyPropertyMask BIT2 = 1. Test done: 1: Created case that has IOMMU access attribute request before DMAR table is installed, ASSERT was triggered after setting PcdVTdPolicyPropertyMask BIT2 to 1. 2. Confirmed RequestAccessAttribute(), ProcessRequestedAccessAttribute() and mAccessRequestXXX variables were optimized by compiler after setting PcdVTdPolicyPropertyMask BIT2 to 1. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2018-03-06IntelSiliconPkg VTdPmrPei: Add PcdVTdPeiDmaBufferSize(S3)Star Zeng1-1/+17
Add PcdVTdPeiDmaBufferSize(S3) to replace the hard coded value TOTAL_DMA_BUFFER_SIZE and TOTAL_DMA_BUFFER_SIZE_S3 in IntelVTdPmrPei. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2017-11-30IntelSiliconPkg: Move MicrocodeUpdate from UefiCpuPkgStar Zeng1-1/+9
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=540 To consume FIT table for Microcode update, UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe needs to be updated to consume IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h, but UefiCpuPkg could not depend on IntelSiliconPkg. Since the Microcode update feature is specific to Intel, we can first move the Microcode update feature code from UefiCpuPkg to IntelSiliconPkg [first step], then update the code to consume FIT table [second step]. This patch series is for the first step. Note: No any code change in this patch, just move. Next patch will update MicrocodeUpdate to build with the package. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
2017-09-23IntelSiliconPkg/dec: Clarify VTdPolicy.Jiewen Yao1-2/+2
Clarify the VTdPolicy is for both PEI and DXE. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-16IntelSiliconPkg/dec: Add VTD_INFO PPI GUIDJiewen Yao1-0/+3
Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-07IntelSiliconPkg/dec: Add VTd policy PCDJiewen Yao1-0/+6
BIT0: This is to control if a platform wants to enable VTd based protection during boot. BIT1: This is to control if a platform wants to keep VTd enabled at ExitBootService. The default configuration is BIT0:1, BIT1:0. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-07-27IntelSiliconPkg/Dec: Add ProtocolGuid.Jiewen Yao1-0/+3
Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-11-17IntelSiliconPkg/IntelSiliconPkg.dec: drop bogus semicolon from GUID defLaszlo Ersek1-1/+1
The DEC spec doesn't allow the trailing semicolon: 2.6 [Guids] Usage GuidCName = {C Format Guid Value} # Comment Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-14IntelSiliconPkg: Add PCD for Graphics VBT FFS GUIDGiri P Mudusuru1-0/+12
Added PCD PcdIntelGraphicsVbtFileGuid to store raw format Graphics Video BIOS Table (VBT) in FFS. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-01IntelSiliconPkg: Add SMBIOS data HOB GUIDMudusuru, Giri P1-0/+7
Add gIntelSmbiosDataHobGuid used to publish SMBIOS data from PEI phase. The HOB data format will be same as SMBIOS spec define formats for Types 0 to 127 and OEM defined types for 128 to 255. Generic library or DXE driver can add SMBIOS records using this HOB(s). Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-06-15IntelSiliconPkg: Add initial version.Jiewen Yao1-0/+24
This package will include open source common Intel silicon related modules. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
generated by cgit v1.1 at 2024-11-07 17:09:45 +0000