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2017-03-06IntelFspWrapperPkg: Refine casting expression result to bigger sizeHao Wu1-6/+6
There are cases that the operands of an expression are all with rank less than UINT64/INT64 and the result of the expression is explicitly cast to UINT64/INT64 to fit the target size. An example will be: UINT32 a,b; // a and b can be any unsigned int type with rank less than UINT64, like // UINT8, UINT16, etc. UINT64 c; c = (UINT64) (a + b); Some static code checkers may warn that the expression result might overflow within the rank of "int" (integer promotions) and the result is then cast to a bigger size. The commit refines codes by the following rules: 1). When the expression is possible to overflow the range of unsigned int/ int: c = (UINT64)a + b; 2). When the expression will not overflow within the rank of "int", remove the explicit type casts: c = a + b; 3). When the expression will be cast to pointer of possible greater size: UINT32 a,b; VOID *c; c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b); 4). When one side of a comparison expression contains only operands with rank less than UINT32: UINT8 a; UINT16 b; UINTN c; if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...} For rule 4), if we remove the 'UINTN' type cast like: if (a + b > c) {...} The VS compiler will complain with warning C4018 (signed/unsigned mismatch, level 3 warning) due to promoting 'a + b' to type 'int'. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-24IntelFspWrapperPkg: Fix typos in commentsGary Lin1-2/+2
- inforamtion -> information - tempory -> temporary - boundry -> boundary - immediatly -> immediately - permenent -> permanent Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-03-25IntelFspWrapperPkg: PeiFspHobProcessLibSample: remove set but unused variablesLaszlo Ersek1-2/+1
Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2015-12-15Fix >4G issue on IDT not restored correctly.Yao, Jiewen1-1/+13
Idtr might be changed inside of FSP. 32bit FSP only knows the <4G address. If IDTR.Base is >4G, FSP can not handle. So we need save/restore IDTR here. Interrupt is already disabled here, so it is safety to update IDTR. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> Reviewed-by: "Yarlagadda, Satya P" <satya.p.yarlagadda@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19246 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-27Publish FspHob to PEI Hob by default.Yao, Jiewen2-0/+39
because most platforms use such logic. PcdDataBaseHobGuid GuidHob is excluded because PCD database in FSP is different with the one in PEI. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18687 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-27Fix issue that calling GetS3MemoryInfo() with wrong order.Yao, Jiewen1-1/+1
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18679 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-27Do not deadloop if Microcode not found in FspTempRamInit.Yao, Jiewen2-1/+21
We do not consider microcode not found as critical error, because Microcode might be applied later. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18678 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-08IntelFspWrapperPkg: Update PeiFspHobProcessLibSample to consume PI CapsulePpiLiming Gao2-3/+3
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17376 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-23IntelFspWrapperPkg update for FSP1.1Yao, Jiewen1-0/+16
-- Add BootLoaderTolumSize support -- Fix LibraryClasses declaration in DEC file. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17197 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-11Update IntelFspWrapperPkg according to FSP1.1.Yao, Jiewen6-30/+187
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16826 6f19259b-4bc3-4df7-8a09-765794883524
2015-01-19IntelFspWrapperPkg: Refine the format of meta data files.Shumin Qiu4-23/+23
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Shumin Qiu <shumin.qiu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16623 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-04Fix typo.Yao, Jiewen1-2/+2
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16475 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-03IntelFspPkg/IntelFspWrapperPkg: Fix some typos.Star Zeng1-3/+3
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16040 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-06Eliminate duplicated file GUID.jyao11-5/+8
Eliminate duplicate GUID definition. Do explicit data cast. Use StrnCpy instead of StrCpy. Update GCC assembly. Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Eric Dong <eric.dong@intel.com> Reviewed by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15762 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04Clean up code.jyao13-1/+8
Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Eric Dong <eric.dong@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15743 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-24Add IntelFspWrapper to support boot EDKII on FSP bin.jyao127-0/+3397
Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Ravi Rangarajan <ravi.p.rangarajan@intel.com> Reviewed by: Maurice Ma <maurice.ma@intel.com> Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com> Reviewed by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15676 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.1 at 2024-09-08 20:18:24 +0000