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authorYao, Jiewen <jiewen.yao@intel.com>2015-02-11 04:41:46 +0000
committerjyao1 <jyao1@Edk2>2015-02-11 04:41:46 +0000
commitd8043ce905a5832f911361ef30be28765afbdc6b (patch)
tree4b4f7171c97efc733c95cc3abf65af351017c955 /IntelFspWrapperPkg/Library
parentd5fb1edfb16a2af29486ffbf5aa32a036da9caa4 (diff)
downloadedk2-d8043ce905a5832f911361ef30be28765afbdc6b.zip
edk2-d8043ce905a5832f911361ef30be28765afbdc6b.tar.gz
edk2-d8043ce905a5832f911361ef30be28765afbdc6b.tar.bz2
Update IntelFspWrapperPkg according to FSP1.1.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16826 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFspWrapperPkg/Library')
-rw-r--r--IntelFspWrapperPkg/Library/BaseFspApiLib/BaseFspApiLib.inf1
-rw-r--r--IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c118
-rw-r--r--IntelFspWrapperPkg/Library/BaseFspApiLib/IA32/DispatchExecute.c12
-rw-r--r--IntelFspWrapperPkg/Library/BaseFspApiLib/X64/DispatchExecute.c6
-rw-r--r--IntelFspWrapperPkg/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c32
-rw-r--r--IntelFspWrapperPkg/Library/PeiFspHobProcessLibSample/FspHobProcessLibSample.c48
6 files changed, 187 insertions, 30 deletions
diff --git a/IntelFspWrapperPkg/Library/BaseFspApiLib/BaseFspApiLib.inf b/IntelFspWrapperPkg/Library/BaseFspApiLib/BaseFspApiLib.inf
index 2608bf1..2df1683 100644
--- a/IntelFspWrapperPkg/Library/BaseFspApiLib/BaseFspApiLib.inf
+++ b/IntelFspWrapperPkg/Library/BaseFspApiLib/BaseFspApiLib.inf
@@ -61,6 +61,7 @@
IntelFspWrapperPkg/IntelFspWrapperPkg.dec
[LibraryClasses]
+ BaseLib
[Guids]
gFspHeaderFileGuid ## CONSUMES ## GUID
diff --git a/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c b/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
index abe61b7..162d244 100644
--- a/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
+++ b/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
@@ -1,7 +1,7 @@
/** @file
Provide FSP API related function.
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -17,6 +17,7 @@
#include <Guid/FspHeaderFile.h>
#include <Library/FspApiLib.h>
+#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
/**
@@ -26,9 +27,9 @@
@param[in] Function The 32bit code entry to be executed.
@param[in] Param1 The first parameter to pass to 32bit code.
- @return FSP_STATUS.
+ @return EFI_STATUS.
**/
-FSP_STATUS
+EFI_STATUS
Execute32BitCode (
IN UINT64 Function,
IN UINT64 Param1
@@ -84,22 +85,25 @@ FspFindFspHeader (
@param[in] FspHeader FSP header pointer.
@param[in] FspInitParams Address pointer to the FSP_INIT_PARAMS structure.
- @return FSP status returned by FspInit API.
+ @return EFI status returned by FspInit API.
**/
-FSP_STATUS
+EFI_STATUS
EFIAPI
CallFspInit (
IN FSP_INFO_HEADER *FspHeader,
IN FSP_INIT_PARAMS *FspInitParams
)
{
- FSP_FSP_INIT FspInitApi;
- FSP_STATUS FspStatus;
+ FSP_INIT FspInitApi;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
- FspInitApi = (FSP_FSP_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspInitEntryOffset);
- FspStatus = Execute32BitCode ((UINTN)FspInitApi, (UINTN)FspInitParams);
+ FspInitApi = (FSP_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspInitEntryOffset);
+ InterruptState = SaveAndDisableInterrupts ();
+ Status = Execute32BitCode ((UINTN)FspInitApi, (UINTN)FspInitParams);
+ SetInterruptState (InterruptState);
- return FspStatus;
+ return Status;
}
/**
@@ -108,9 +112,9 @@ CallFspInit (
@param[in] FspHeader FSP header pointer.
@param[in] NotifyPhaseParams Address pointer to the NOTIFY_PHASE_PARAMS structure.
- @return FSP status returned by FspNotifyPhase API.
+ @return EFI status returned by FspNotifyPhase API.
**/
-FSP_STATUS
+EFI_STATUS
EFIAPI
CallFspNotifyPhase (
IN FSP_INFO_HEADER *FspHeader,
@@ -118,10 +122,94 @@ CallFspNotifyPhase (
)
{
FSP_NOTIFY_PHASE NotifyPhaseApi;
- FSP_STATUS FspStatus;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
NotifyPhaseApi = (FSP_NOTIFY_PHASE)(UINTN)(FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);
- FspStatus = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams);
+ InterruptState = SaveAndDisableInterrupts ();
+ Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams);
+ SetInterruptState (InterruptState);
- return FspStatus;
+ return Status;
+}
+
+/**
+ Call FSP API - FspMemoryInit.
+
+ @param[in] FspHeader FSP header pointer.
+ @param[in,out] FspMemoryInitParams Address pointer to the FSP_MEMORY_INIT_PARAMS structure.
+
+ @return EFI status returned by FspMemoryInit API.
+**/
+EFI_STATUS
+EFIAPI
+CallFspMemoryInit (
+ IN FSP_INFO_HEADER *FspHeader,
+ IN OUT FSP_MEMORY_INIT_PARAMS *FspMemoryInitParams
+ )
+{
+ FSP_MEMORY_INIT FspMemoryInitApi;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
+
+ FspMemoryInitApi = (FSP_MEMORY_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);
+ InterruptState = SaveAndDisableInterrupts ();
+ Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspMemoryInitParams);
+ SetInterruptState (InterruptState);
+
+ return Status;
+}
+
+/**
+ Call FSP API - TempRamExit.
+
+ @param[in] FspHeader FSP header pointer.
+ @param[in,out] TempRamExitParam Address pointer to the TempRamExit parameters structure.
+
+ @return EFI status returned by TempRamExit API.
+**/
+EFI_STATUS
+EFIAPI
+CallTempRamExit (
+ IN FSP_INFO_HEADER *FspHeader,
+ IN OUT VOID *TempRamExitParam
+ )
+{
+ FSP_TEMP_RAM_EXIT TempRamExitApi;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
+
+ TempRamExitApi = (FSP_TEMP_RAM_EXIT)(UINTN)(FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);
+ InterruptState = SaveAndDisableInterrupts ();
+ Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam);
+ SetInterruptState (InterruptState);
+
+ return Status;
+}
+
+/**
+ Call FSP API - FspSiliconInit.
+
+ @param[in] FspHeader FSP header pointer.
+ @param[in,out] FspSiliconInitParam Address pointer to the Silicon Init parameters structure.
+
+ @return EFI status returned by FspSiliconInit API.
+**/
+EFI_STATUS
+EFIAPI
+CallFspSiliconInit (
+ IN FSP_INFO_HEADER *FspHeader,
+ IN OUT VOID *FspSiliconInitParam
+ )
+{
+ FSP_SILICON_INIT FspSiliconInitApi;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
+
+ FspSiliconInitApi = (FSP_SILICON_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);
+ InterruptState = SaveAndDisableInterrupts ();
+ Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspSiliconInitParam);
+ SetInterruptState (InterruptState);
+
+ return Status;
}
diff --git a/IntelFspWrapperPkg/Library/BaseFspApiLib/IA32/DispatchExecute.c b/IntelFspWrapperPkg/Library/BaseFspApiLib/IA32/DispatchExecute.c
index 15d0a02..8bc3501 100644
--- a/IntelFspWrapperPkg/Library/BaseFspApiLib/IA32/DispatchExecute.c
+++ b/IntelFspWrapperPkg/Library/BaseFspApiLib/IA32/DispatchExecute.c
@@ -1,7 +1,7 @@
/** @file
Execute 32-bit code in Protected Mode.
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -16,8 +16,8 @@
#include <FspApi.h>
typedef
-FSP_STATUS
-(FSPAPI *FSP_FUNCTION) (
+EFI_STATUS
+(EFIAPI *FSP_FUNCTION) (
IN VOID *Param1
);
@@ -28,16 +28,16 @@ FSP_STATUS
@param[in] Function The 32bit code entry to be executed.
@param[in] Param1 The first parameter to pass to 32bit code.
- @return FSP_STATUS.
+ @return EFI_STATUS.
**/
-FSP_STATUS
+EFI_STATUS
Execute32BitCode (
IN UINT64 Function,
IN UINT64 Param1
)
{
FSP_FUNCTION EntryFunc;
- FSP_STATUS Status;
+ EFI_STATUS Status;
EntryFunc = (FSP_FUNCTION) (UINTN) (Function);
Status = EntryFunc ((VOID *)(UINTN)Param1);
diff --git a/IntelFspWrapperPkg/Library/BaseFspApiLib/X64/DispatchExecute.c b/IntelFspWrapperPkg/Library/BaseFspApiLib/X64/DispatchExecute.c
index 17a9ebc..e2f4422 100644
--- a/IntelFspWrapperPkg/Library/BaseFspApiLib/X64/DispatchExecute.c
+++ b/IntelFspWrapperPkg/Library/BaseFspApiLib/X64/DispatchExecute.c
@@ -3,7 +3,7 @@
Provide a thunk function to transition from long mode to compatibility mode to execute 32-bit code and then transit
back to long mode.
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -81,9 +81,9 @@ AsmExecute32BitCode (
@param[in] Function The 32bit code entry to be executed.
@param[in] Param1 The first parameter to pass to 32bit code.
- @return FSP_STATUS.
+ @return EFI_STATUS.
**/
-FSP_STATUS
+EFI_STATUS
Execute32BitCode (
IN UINT64 Function,
IN UINT64 Param1
diff --git a/IntelFspWrapperPkg/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c b/IntelFspWrapperPkg/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c
index 7c57e7b..d21c566 100644
--- a/IntelFspWrapperPkg/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c
+++ b/IntelFspWrapperPkg/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c
@@ -83,6 +83,38 @@ UpdateFspUpdConfigs (
}
/**
+ Get TempRamExit parameter.
+
+ @note At this point, memory is ready, PeiServices are available to use.
+
+ @return TempRamExit parameter.
+**/
+VOID *
+EFIAPI
+GetTempRamExitParam (
+ VOID
+ )
+{
+ return NULL;
+}
+
+/**
+ Get FspSiliconInit parameter.
+
+ @note At this point, memory is ready, PeiServices are available to use.
+
+ @return FspSiliconInit parameter.
+**/
+VOID *
+EFIAPI
+GetFspSiliconInitParam (
+ VOID
+ )
+{
+ return NULL;
+}
+
+/**
Get S3 PEI memory information.
@note At this point, memory is ready, and PeiServices are available to use.
diff --git a/IntelFspWrapperPkg/Library/PeiFspHobProcessLibSample/FspHobProcessLibSample.c b/IntelFspWrapperPkg/Library/PeiFspHobProcessLibSample/FspHobProcessLibSample.c
index eac0435..bad6111 100644
--- a/IntelFspWrapperPkg/Library/PeiFspHobProcessLibSample/FspHobProcessLibSample.c
+++ b/IntelFspWrapperPkg/Library/PeiFspHobProcessLibSample/FspHobProcessLibSample.c
@@ -1,7 +1,7 @@
/** @file
Sample to provide FSP hob process related function.
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -132,7 +132,7 @@ GetPeiMemSize (
}
/**
- BIOS process FspBobList.
+ BIOS process FspBobList for Memory Resource Descriptor.
@param[in] FspHobList Pointer to the HOB data structure produced by FSP.
@@ -140,7 +140,7 @@ GetPeiMemSize (
**/
EFI_STATUS
EFIAPI
-FspHobProcess (
+FspHobProcessForMemoryResource (
IN VOID *FspHobList
)
{
@@ -331,9 +331,45 @@ FspHobProcess (
}
}
- //
- // NV Storage Hob
- //
+ return EFI_SUCCESS;
+}
+
+/**
+ BIOS process FspBobList for other data (not Memory Resource Descriptor).
+
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.
+ @return If platform process the FSP hob list successfully.
+**/
+EFI_STATUS
+EFIAPI
+FspHobProcessForOtherData (
+ IN VOID *FspHobList
+ )
+{
return EFI_SUCCESS;
}
+
+/**
+ BIOS process FspBobList.
+
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.
+
+ @return If platform process the FSP hob list successfully.
+**/
+EFI_STATUS
+EFIAPI
+FspHobProcess (
+ IN VOID *FspHobList
+ )
+{
+ EFI_STATUS Status;
+
+ Status = FspHobProcessForMemoryResource (FspHobList);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ Status = FspHobProcessForOtherData (FspHobList);
+
+ return Status;
+}