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2020-05-15CryptoPkg/BaseCryptLib: Retire the TDES algorithmZhichao Gao16-1377/+60
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1898 TDES is not secure any longer. Remove the Tdes support from edk2. Change the Tdes field name in EDKII_CRYPTO_PROTOCOL to indicate the function is unsupported any longer. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2020-05-15CryptoPkg/OpensslLib: Set ARC4 disable in OpensslLibZhichao Gao4-6/+4
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1898 This patch is create by adding the setting "no_rc4" of process_files.pl and running it thru perl. It would remove the ARC4 from OpensslLib. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2020-05-15CryptoPkg/BaseCryptLib: Retire ARC4 algorithmZhichao Gao15-917/+48
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1898 ARC4 is not secure any longer. Remove the ARC4 support from edk2. Change the ARC4 field name in EDKII_CRYPTO_PROTOCOL to indicate the function is unsupported any longer. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2020-05-15CryptoPkg/OpensslLib: Set MD4 disable in OpensslLibZhichao Gao4-6/+4
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1898 This patch is create by adding the setting "no_md4" of process_files.pl and running it thru perl. It would remove the MD4 from OpensslLib. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2020-05-15CryptoPkg/BaseCrpytLib: Retire MD4 algorithmZhichao Gao16-1011/+62
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1898 MD4 is not secure any longer. Remove the MD4 support from edk2. Change the MD4 field name in EDKII_CRYPTO_PROTOCOL to indicate the function is unsupported any longer. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2020-05-15CryptoPkg/CryptoDxe: Add function to indicate the deprecated algorithmZhichao Gao1-3/+21
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1898 Add a internal worker function to indicate the deprecated functions. It would print out debug messages and asserts to inform the consumer they are using a deprecated function. Change the Name of BaseCryptLibServciceNotEnabled to correct spelling BaseCryptLibServiceNotEnabled. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2020-05-15FmpDevicePkg/FmpDxe: Use new Fmp dependency librariesWei6 Xu6-948/+64
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2696 Remove the orginal Fmp Capsule Dependency implement, and use new FmpDependencyLib, FmpDependencyCheckLib and FmpDependencyDeviceLib APIs instead. A platform can perform the dependency check in a platform specific manner by implementing its own FmpDependencyCheckLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Wei6 Xu <wei6.xu@intel.com> Reviewed-by: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-05-15FmpDevicePkg: Add FmpDependencyDevice library class and NULL instanceWei6 Xu6-0/+149
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2696 This library provides firmware device specific services to support saving dependency to firmware device and getting dependency from firmware device. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Wei6 Xu <wei6.xu@intel.com> Reviewed-by: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-05-15FmpDevicePkg: Add FmpDependencyCheck library class and instancesWei6 Xu9-0/+374
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2696 * This library class provides platform specific services to support dependency check during updating firmware image. Platform can perform dependency check in platform specific manner by implementing its own FmpDependencyCheckLib. * Add FmpDependencyCheck instance to provide a sample of dependency check. The sample instance only checks the dependency from capsule image. The dependency from other FMP instances isn't checked here. * Add NULL instance as an option to skip the dependency check. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Wei6 Xu <wei6.xu@intel.com> Reviewed-by: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-05-15FmpDevicePkg/Test: Add FmpDependencyLib unit testWei6 Xu6-0/+384
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2696 * Add unit tests for EvaluateDependency API in FmpDependencyLib. * Add Test/FmpDeviceHostPkgTest.dsc to build host based unit test. * Update FmpDevicePkg.dsc to build target based unit test. * Update FmpDevicePkg.ci.yaml to build and run host based test. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Wei6 Xu <wei6.xu@intel.com> Reviewed-by: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-05-15FmpDevicePkg: Add FmpDependency library class and BASE instanceWei6 Xu6-2/+689
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2696 This library provides services to evaluate Fmp capsule dependency expression, validate dependency expression and get dependency from firmware image. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Wei6 Xu <wei6.xu@intel.com> Reviewed-by: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-05-15MdePkg: UEFI JSON Capsule SupportOleksiy Yakovlev4-0/+134
Added Guids and structures, that defines the work flow to perform capsule update using JSON objects. (UEFI 2.8 mantis 1935) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2020-05-15MdePkg: Add UEFI Spec Revision 2.8Oleksiy Yakovlev1-0/+1
Added entrie in the EFI_SYSTEM_TABLE related definitions section, to signify UEFI 2.8 spec revision. (UEFI 2.8 mantis 1926) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2020-05-15MdePkg: Bootable NVDIMM namespacesOleksiy Yakovlev1-0/+12
Provided a mechanism for UEFI FW to identify and hand off bootable NVDIMM namespaces to the OS by standardizing the EFI device path. EFI device path for physical NVDIMM devices changed from an ACPI _ADR device to an ACPI NVDIMM device for correctness. (UEFI 2.8 mantis 1858) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2020-05-15BaseTools: Bootable NVDIMM namespacesOleksiy Yakovlev1-0/+12
Provided a mechanism for UEFI FW to identify and hand off bootable NVDIMM namespaces to the OS by standardizing the EFI device path. EFI device path for physical NVDIMM devices changed from an ACPI _ADR device to an ACPI NVDIMM device for correctness. (UEFI 2.8 mantis 1858) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2020-05-15MdePkg: REST style formsetOleksiy Yakovlev3-0/+10
New ClassGuid EFI_HII_REST_STYLE_FORMSET_GUID is defined. In question level, a new flag EFI_IFR_FLAG_REST_STYLE is defined. (UEFI 2.8 mantis 1853) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2020-05-15BaseTools: REST style formsetOleksiy Yakovlev1-0/+1
In question level, a new flag EFI_IFR_FLAG_REST_STYLE is defined. (UEFI 2.8 mantis 1853) Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2020-05-15MdePkg: Extend SERIAL_IO with DeviceTypeGuidOleksiy Yakovlev1-0/+9
EFI_SERIAL_IO_PROTOCOL_REVISION incremented to 0x00010001. CONST EFI_GUID *DeviceTypeGuid field added to the protocol structure. UEFI 2.8 mantis 1832. Signed-off-by: Oleksiy Yakovlev <oleksiyy@ami.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2020-05-14OvmfPkg: Skip initrd command on Xcode toolchainRoman Bolshakov8-8/+8
OVMF booting stops with the assert if built with Xcode on macOS: Loading driver at 0x0001FAB8000 EntryPoint=0x0001FABF249 LinuxInitrdDynamicShellCommand.efi InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 1F218398 ProtectUefiImageCommon - 0x1F218140 - 0x000000001FAB8000 - 0x0000000000008A60 ASSERT_EFI_ERROR (Status = Unsupported) ASSERT LinuxInitrdDynamicShellCommand.c(378): !EFI_ERROR (Status) The assert comes from InitializeHiiPackage() after an attempt to retrieve HII package list from ImageHandle. Xcode still doesn't support HII resource section and LinuxInitrdDynamicShellCommand depends on it. Likewise 277a3958d93a ("OvmfPkg: Don't include TftpDynamicCommand in XCODE5 tool chain"), disable initrd command if built with Xcode toolchain Fixes: ec41733cfd10 ("OvmfPkg: add the 'initrd' dynamic shell command") Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Liming Gao <liming.gao@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200514134820.62047-1-r.bolshakov@yadro.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-05-14MdeModulePkg/RegularExpressionDxe: Optimize the code infrastructureShenglei Zhang4-49/+12
OnigurumaIntrinsics.c is now not used. So the implement of function 'memcpy' is now not., which causes build failure with CLANG9 and XCODE. I remove OnigurumaIntrinsics.c and move the necessary function implement to OnigurumaUefiPort.c/h. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2020-05-14IntelFsp2Pkg: Support Multi-Phase SiInit and debug handlers.Chasel Chiu11-16/+352
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2698 To enhance FSP silicon initialization flexibility an optional Multi-Phase API is introduced and FSP header needs update for new API offset. Also new SecCore module created for FspMultiPhaseSiInit API New ARCH_UPD introduced for enhancing FSP debug message flexibility now bootloader can pass its own debug handler function pointer and FSP will call the function to handle debug message. To support calling bootloader functions, a FspGlobalData field added to indicate if FSP needs to switch stack when FSP running on separate stack from bootloader. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2020-05-13BaseTools: Fix parse PCD GUID expression issueFeng, YunhuaX1-5/+5
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2686 The build tool will give an incorrect GUID value if the GUID includes character ' or " ASCII value. This patch is going to fix this issue. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-05-13BaseTools/Ecc: Replace deprecated function time.clock()Michael Kubacki1-2/+3
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2707 Ecc fails with Python 3.8 because it uses the deprecated time.clock() function - https://docs.python.org/3.7/library/time.html#time.clock This change updates EccMain.py to use time.perf_counter(). Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-05-12StandaloneMmPkg: switch to MM communicate 2 protocolArd Biesheuvel2-2/+2
Update the reference to MM communicate to refer to the MM communicate 2 protocol instead. This makes no difference for the MM side of the implementation, but is more accurate nonetheless, since the original MM protocol does not work in combination with standalone MM. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2020-05-12MdeModulePkg/VariableSmmRuntimeDxe: switch to MM communicate 2Ard Biesheuvel3-23/+26
Switch to the new MM communicate 2 protocol which supports both traditional and standalone MM. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2020-05-12MdeModulePkg/FaultTolerantWriteSmmDxe: switch to MM communicate 2Ard Biesheuvel4-15/+18
Switch to the new MM communicate 2 protocol which supports both traditional and standalone MM. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2020-05-12MdeModulePkg/VariableInfo: switch to MM communicate 2 protocolArd Biesheuvel2-9/+12
Switch to the new MM communicate 2 protocol which supports both traditional and standalone MM. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2020-05-12ArmPkg/MmCommunicationDxe: expose MM Communicate 2 protocolArd Biesheuvel2-48/+43
Implement the new MmCommunication2 protocol which supports the use of standalone MM at runtime inside an address space that has been virtually remapped by the OS. Note that the implementation of the old MM Communicate protocol is removed: it never worked correctly so there is no point in keeping it. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2020-05-12MdeModulePkg/SmmIpl: expose MM communicate 2 protocolArd Biesheuvel2-0/+81
The MM communicate 2 protocol was introduced to factor out the mismatch between traditional MM, which requires the physical address of the MM buffer to be passed, and standalone MM, which copies the MM communicate buffer data into a separate buffer, requiring the virtual address. For this reason, MM communicate 2 carries both addresses, allowing the implementation to decide which address it needs. This hides this implementation detail from the callers of the protocol, which simply passes both addresses without having to reason about what the implementation of the protocol actually needs. Note that the old version of the protocol is retained, in order to support existing implementations that don't require this flexibility. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2020-05-12MdePkg: introduce MM communicate 2 protocolArd Biesheuvel2-0/+76
Add the protocol definition of the MM communicate 2 protocol, which has been introduced by version 1.7 errata A of the PI spec. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2020-05-11UefiCpuPkg/CpuExceptionHandler: Revert CpuExceptionHandler binary patchingLendacky, Thomas1-19/+6
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2340 Now that an XCODE5 specific CpuExceptionHandlerLib library is in place, revert the changes made to the ExceptionHandlerAsm.nasm in commit 2db0ccc2d7fe ("UefiCpuPkg: Update CpuExceptionHandlerLib pass XCODE5 tool chain") so that binary patching of flash code is not performed. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Liming Gao <liming.gao@intel.com> Acked-by: Bret Barkelew <bret.barkelew@microsoft.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <810f67d8604c054c09d17a22f0bcfaeb41ee8e3b.1588856809.git.thomas.lendacky@amd.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
2020-05-11OvmfPkg: Use toolchain appropriate CpuExceptionHandlerLibLendacky, Thomas4-0/+16
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2340 During the SEC phase, use the XCODE5 CpuExceptionHandlerLib library in place of the standard library when building with the XCODE5 toolchain. The SEC XCODE5 version of the library performs binary patching and should only be used when building with the XCODE5 toolchain. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Julien Grall <julien@xen.org> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <0cfdd51deb6d39e08380645f2022b9b76e29f66f.1588856809.git.thomas.lendacky@amd.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
2020-05-11UefiCpuPkg/CpuExceptionHandler: Make XCODE5 changes toolchain specificLendacky, Thomas7-3/+479
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2340 Commit 2db0ccc2d7fe ("UefiCpuPkg: Update CpuExceptionHandlerLib pass XCODE5 tool chain") introduced binary patching into the exception handling support. CPU exception handling is allowed during SEC and this results in binary patching of flash, which should not be done. Separate the changes from commit 2db0ccc2d7fe into an XCODE5 toolchain specific file, Xcode5ExceptionHandlerAsm.nasm, and create a new SEC INF file for the XCODE5 version of CpuExceptionHandlerLib. Since binary patching is allowed when running outside of flash, switch the Dxe, Pei and Smm versions of the CpuExceptionHandlerLib over to use the Xcode5ExceptionHandlerAsm.nasm file to retain current functionality. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <9075570487616c731033a5738f6a444a15d71b74.1588856809.git.thomas.lendacky@amd.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
2020-05-08BaseTools/Plugin: Update HostBasedUnitTestRunner to support LinuxSean Brogan2-31/+31
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2513 Update HostBasedUnitTestRunner plugin to support the Linux environment and remove any Windows only logic. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-05-08.pytool/CISettings: Remove Windows only scope for host based unit testsSean Brogan1-3/+0
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2513 Remove Windows only scopes in the CISettngs file Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-05-08BaseTools: add handling for 'S:' flag to GetMaintainer.pyLeif Lindholm1-0/+4
GetMaintainer.py already extracts the value of any S: tags for sections, but it doesn't do anything with that information. Print a warning message, with the status, for each matching section with a status explicitly set to anything other than 'Supported' or 'Maintained'. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-05-08BaseTools: add repo name option to SetupGit.pyRebecca Cran1-3/+9
Allow users who didn't clone one of the TianoCore repos from a canonical URL to specify the name of the repo (edk2, edk2-platforms or edk2-non-osi) when running SetupGit.py to allow them to configure their repo properly. The new option is: -n repo, --name repo set the repo name to configure for, if not detected automatically Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2020-05-07NetworkPkg: Add RISCV64 architectureAbner Chang1-1/+2
Add RISCV64 Arch in NetworkPkg. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com> Acked-by: Siyuan Fu <siyuan.fu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdeModulePkg/DxeIplPeim : RISC-V platform level DxeIPLAbner Chang2-1/+79
Implementation of RISC-V DxeIPL. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Co-authored-by: Daniel Helmut <daniel.schaefer@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Dandan Bi <dandan.bi@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdeModulePkg/CapsuleRuntimeDxe: Add RISCV64 architectureAbner Chang1-4/+5
Add RISC-V in INF for building CapsuleRuntimeDxe RISCV64 image. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Hao A Wu <hao.a.wu@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdeModulePkg/Logo:Add RISCV64 architectureAbner Chang1-1/+3
Add RISCV64 Arch. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Zhichao Gao <zhichao.gao@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdePkg/BaseSafeIntLib: Add RISCV64 arch for BaseSafeIntLib.Abner Chang1-2/+4
Add RISCV64 arch for BaseSafeIntLib library. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com> Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
2020-05-07MdePkg/BaseSynchronizationLib: RISC-V cache related code.Abner Chang2-0/+83
Support RISC-V cache related functions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdePkg/BaseCpuLib: RISC-V Base CPU libraryAbner Chang3-3/+27
implementation. Implement RISC-V CPU related functions in BaseCpuLib. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdePkg/BasePeCoff: Add RISC-V PE/Coff related code.Abner Chang5-1/+151
Support RISC-V image relocation. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdePkg/BaseIoLibIntrinsic: Rename IoLibArm.c=>IoLibNoIo.cAbner Chang2-5/+12
RISC-V MMIO library instance. IoLibArm.c in fact implements a generic Mmio-only (and ANSI C compliant), so rename it to better reflect this. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdePkg/BaseCacheMaintenanceLib:Abner Chang2-0/+254
RISC-V cache maintenance implementation. Implement RISC-V cache maintenance functions in BaseCacheMaintenanceLib. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdePkg/BaseLib: BaseLib for RISCV64 architectureAbner Chang13-1/+374
Add RISC-V RV64 BaseLib functions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdePkg/Include: RISC-V definitions.Abner Chang5-0/+89
Add RISC-V processor related definitions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07MdePkg: Add RISC-V RISCV64 bindingAbner Chang3-2/+179
Add RISCV64 sections in MdePkg.dec and RISCV64 ProcessorBind.h REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
generated by cgit v1.1 at 2024-10-18 19:38:25 +0000