diff options
Diffstat (limited to 'PcAtChipsetPkg/Library')
11 files changed, 51 insertions, 51 deletions
diff --git a/PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c b/PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c index 2f3cb4b..9817bea 100644 --- a/PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c +++ b/PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c @@ -58,13 +58,13 @@ AcpiTimerLibConstructor ( UINT8 EnableMask;
//
- // ASSERT for the invalid PCD values. They must be configured to the real value.
+ // ASSERT for the invalid PCD values. They must be configured to the real value.
//
ASSERT (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0xFFFF);
ASSERT (PcdGet16 (PcdAcpiIoPortBaseAddress) != 0xFFFF);
//
- // If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then
+ // If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then
// no PCI register programming is required to enable access to the the ACPI registers
// specified by PcdAcpiIoPortBaseAddress
//
@@ -73,7 +73,7 @@ AcpiTimerLibConstructor ( }
//
- // ASSERT for the invalid PCD values. They must be configured to the real value.
+ // ASSERT for the invalid PCD values. They must be configured to the real value.
//
ASSERT (PcdGet8 (PcdAcpiIoPciDeviceNumber) != 0xFF);
ASSERT (PcdGet8 (PcdAcpiIoPciFunctionNumber) != 0xFF);
@@ -101,7 +101,7 @@ AcpiTimerLibConstructor ( EnableMask
);
}
-
+
return RETURN_SUCCESS;
}
@@ -119,23 +119,23 @@ InternalAcpiGetAcpiTimerIoPort ( )
{
UINT16 Port;
-
+
Port = PcdGet16 (PcdAcpiIoPortBaseAddress);
-
+
//
- // If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then
- // read the PCI register for the ACPI BAR value in case the BAR has been programmed to a
+ // If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then
+ // read the PCI register for the ACPI BAR value in case the BAR has been programmed to a
// value other than PcdAcpiIoPortBaseAddress
//
if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {
Port = PciRead16 (PCI_LIB_ADDRESS (
- PcdGet8 (PcdAcpiIoPciBusNumber),
- PcdGet8 (PcdAcpiIoPciDeviceNumber),
- PcdGet8 (PcdAcpiIoPciFunctionNumber),
+ PcdGet8 (PcdAcpiIoPciBusNumber),
+ PcdGet8 (PcdAcpiIoPciDeviceNumber),
+ PcdGet8 (PcdAcpiIoPciFunctionNumber),
PcdGet16 (PcdAcpiIoPciBarRegisterOffset)
));
}
-
+
return (Port & PcdGet16 (PcdAcpiIoPortBaseAddressMask)) + PcdGet16 (PcdAcpiPm1TmrOffset);
}
diff --git a/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c b/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c index 29521f8..2d79c6c 100644 --- a/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c +++ b/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c @@ -1,7 +1,7 @@ /** @file
ACPI Timer implements one instance of Timer Library.
- Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -47,7 +47,7 @@ InternalCalculateTscFrequency ( UINT64
InternalGetPerformanceCounterFrequency (
VOID
- )
+ )
{
return InternalCalculateTscFrequency ();
}
diff --git a/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf b/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf index 0113b26..b7f737e 100644 --- a/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf +++ b/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf @@ -7,7 +7,7 @@ # Note: The implementation uses the lower 24-bits of the ACPI timer and
# is compatible with both 24-bit and 32-bit ACPI timers.
#
-# Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -31,7 +31,7 @@ [Sources]
AcpiTimerLib.c
BaseAcpiTimerLib.c
-
+
[Packages]
MdePkg/MdePkg.dec
PcAtChipsetPkg/PcAtChipsetPkg.dec
@@ -52,4 +52,4 @@ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset ## CONSUMES
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress ## CONSUMES
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset ## CONSUMES
- gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask ## CONSUMES
\ No newline at end of file + gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask ## CONSUMES
diff --git a/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.uni b/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.uni index 7e26a6a..c0421c3 100644 --- a/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.uni +++ b/PcAtChipsetPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.uni @@ -4,13 +4,13 @@ // Provides basic timer support using the ACPI timer hardware. The performance
// counter features are provided by the processors time stamp counter.
//
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
-//
+//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
diff --git a/PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c b/PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c index 67e18a1..9ed10ef 100644 --- a/PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c +++ b/PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c @@ -1,7 +1,7 @@ /** @file
ACPI Timer implements one instance of Timer Library.
- Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -70,13 +70,13 @@ UINT64 mPerformanceCounterFrequency = 0; UINT64
InternalGetPerformanceCounterFrequency (
VOID
- )
+ )
{
return mPerformanceCounterFrequency;
}
/**
- The constructor function enables ACPI IO space, and caches PerformanceCounterFrequency.
+ The constructor function enables ACPI IO space, and caches PerformanceCounterFrequency.
@param ImageHandle The firmware allocated handle for the EFI image.
@param SystemTable A pointer to the EFI System Table.
diff --git a/PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.uni b/PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.uni index c90da29..bf31abf 100644 --- a/PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.uni +++ b/PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.uni @@ -4,13 +4,13 @@ // Provides basic timer support using the ACPI timer hardware. The performance
// counter features are provided by the processors time stamp counter.
//
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
-//
+//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
diff --git a/PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.uni b/PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.uni index fb8320f..9b533a3 100644 --- a/PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.uni +++ b/PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.uni @@ -3,13 +3,13 @@ //
// Library instance for I/O APIC library class.
//
-// Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
+// Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
-//
+//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
diff --git a/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c b/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c index 42b3f21..0b8f888 100644 --- a/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c +++ b/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c @@ -1,10 +1,10 @@ -/** @file
+/** @file
I/O APIC library.
I/O APIC library assumes I/O APIC is enabled. It does not
handles cases where I/O APIC is disabled.
- Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -30,7 +30,7 @@ Read a 32-bit I/O APIC register.
If Index is >= 0x100, then ASSERT().
-
+
@param Index Specifies the I/O APIC register to read.
@return The 32-bit value read from the I/O APIC register specified by Index.
@@ -50,7 +50,7 @@ IoApicRead ( Write a 32-bit I/O APIC register.
If Index is >= 0x100, then ASSERT().
-
+
@param Index Specifies the I/O APIC register to write.
@param Value Specifies the value to write to the I/O APIC register specified by Index.
@@ -71,7 +71,7 @@ IoApicWrite ( /**
Set the interrupt mask of an I/O APIC interrupt.
- If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().
+ If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().
@param Irq Specifies the I/O APIC interrupt to enable or disable.
@param Enable If TRUE, then enable the I/O APIC interrupt specified by Irq.
@@ -98,13 +98,13 @@ IoApicEnableInterrupt ( /**
Configures an I/O APIC interrupt.
-
+
Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical
- mode to the Local APIC of the currntly executing CPU. The default state of the
+ mode to the Local APIC of the currntly executing CPU. The default state of the
entry is for the interrupt to be disabled (masked). IoApicEnableInterrupts() must
be used to enable(unmask) the I/O APIC Interrupt.
-
- If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().
+
+ If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().
If Vector >= 0x100, then ASSERT().
If DeliveryMode is not supported, then ASSERT().
@@ -142,11 +142,11 @@ IoApicConfigureInterrupt ( ASSERT (Irq <= Version.Bits.MaximumRedirectionEntry);
ASSERT (Vector <= 0xFF);
ASSERT (DeliveryMode < 8 && DeliveryMode != 6 && DeliveryMode != 3);
-
+
Entry.Uint32.Low = IoApicRead (IO_APIC_REDIRECTION_TABLE_ENTRY_INDEX + Irq * 2);
Entry.Bits.Vector = (UINT8)Vector;
Entry.Bits.DeliveryMode = (UINT32)DeliveryMode;
- Entry.Bits.DestinationMode = 0;
+ Entry.Bits.DestinationMode = 0;
Entry.Bits.Polarity = AssertionLevel ? 0 : 1;
Entry.Bits.TriggerMode = LevelTriggered ? 1 : 0;
Entry.Bits.Mask = 1;
diff --git a/PcAtChipsetPkg/Library/ResetSystemLib/ResetSystemLib.uni b/PcAtChipsetPkg/Library/ResetSystemLib/ResetSystemLib.uni index e2ba61c..be6f29f 100644 --- a/PcAtChipsetPkg/Library/ResetSystemLib/ResetSystemLib.uni +++ b/PcAtChipsetPkg/Library/ResetSystemLib/ResetSystemLib.uni @@ -3,13 +3,13 @@ //
// Library instance for ResetSystem library class for PCAT systems
//
-// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+// Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
-//
+//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
diff --git a/PcAtChipsetPkg/Library/SerialIoLib/PcAtSerialPortLib.uni b/PcAtChipsetPkg/Library/SerialIoLib/PcAtSerialPortLib.uni index a1ad72e..e42e0eb 100644 --- a/PcAtChipsetPkg/Library/SerialIoLib/PcAtSerialPortLib.uni +++ b/PcAtChipsetPkg/Library/SerialIoLib/PcAtSerialPortLib.uni @@ -3,13 +3,13 @@ //
// Library instance for SerialIO library class.
//
-// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+// Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
-//
+//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
diff --git a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c index 0a2e20c..d1a1c6a 100644 --- a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c +++ b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c @@ -1,7 +1,7 @@ /** @file
UART Serial Port library functions
- Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -58,11 +58,11 @@ UINT8 gBreakSet = 0; /**
Initialize the serial device hardware.
-
+
If no initialization is required, then return RETURN_SUCCESS.
If the serial device was successfully initialized, then return RETURN_SUCCESS.
If the serial device could not be initialized, then return RETURN_DEVICE_ERROR.
-
+
@retval RETURN_SUCCESS The serial device was initialized.
@retval RETURN_DEVICE_ERROR The serail device could not be initialized.
@@ -86,7 +86,7 @@ SerialPortInitialize ( // Calculate divisor for baud generator
//
Divisor = 115200 / gBps;
-
+
//
// Set communications format
//
@@ -109,13 +109,13 @@ SerialPortInitialize ( }
/**
- Write data from buffer to serial device.
-
- Writes NumberOfBytes data bytes from Buffer to the serial device.
+ Write data from buffer to serial device.
+
+ Writes NumberOfBytes data bytes from Buffer to the serial device.
The number of bytes actually written to the serial device is returned.
If the return value is less than NumberOfBytes, then the write operation failed.
- If Buffer is NULL, then ASSERT().
+ If Buffer is NULL, then ASSERT().
If NumberOfBytes is zero, then return 0.
@@ -123,7 +123,7 @@ SerialPortInitialize ( @param NumberOfBytes Number of bytes to written to the serial device.
@retval 0 NumberOfBytes is 0.
- @retval >0 The number of bytes written to the serial device.
+ @retval >0 The number of bytes written to the serial device.
If this value is less than NumberOfBytes, then the write operation failed.
**/
@@ -164,7 +164,7 @@ SerialPortWrite ( @param NumberOfBytes Number of bytes to read from the serial device.
@retval 0 NumberOfBytes is 0.
- @retval >0 The number of bytes read from the serial device.
+ @retval >0 The number of bytes read from the serial device.
If this value is less than NumberOfBytes, then the read operation failed.
**/
|