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-rw-r--r--OvmfPkg/CloudHv/CloudHvX64.dsc2
-rw-r--r--OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf4
-rw-r--r--OvmfPkg/CpuHotplugSmm/FirstSmiHandler.nasm26
-rw-r--r--OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h8
-rw-r--r--OvmfPkg/CpuHotplugSmm/Smbase.c24
-rw-r--r--OvmfPkg/Include/Library/PlatformInitLib.h1
-rw-r--r--OvmfPkg/PlatformPei/FeatureControl.c1
-rw-r--r--OvmfPkg/RiscVVirt/Library/PlatformSecLib/SecEntry.S3
-rw-r--r--OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc6
-rw-r--r--OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c33
10 files changed, 90 insertions, 18 deletions
diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc
index d941d6d..157aa8e 100644
--- a/OvmfPkg/CloudHv/CloudHvX64.dsc
+++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
@@ -628,7 +628,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|FALSE
# UefiCpuPkg PCDs related to initial AP bringup and general AP management.
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|254
gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber|0
# Set memory encryption mask
diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf b/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf
index ebcc7e2..0996968 100644
--- a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf
+++ b/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf
@@ -42,6 +42,7 @@
BaseMemoryLib
CpuLib
DebugLib
+ HobLib
LocalApicLib
MmServicesTableLib
PcdLib
@@ -53,6 +54,9 @@
gEfiMmCpuIoProtocolGuid ## CONSUMES
gEfiSmmCpuServiceProtocolGuid ## CONSUMES
+[Guids]
+ gUefiOvmfPkgPlatformInfoGuid ## CONSUMES
+
[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress ## CONSUMES
gUefiOvmfPkgTokenSpaceGuid.PcdCpuHotEjectDataAddress ## CONSUMES
diff --git a/OvmfPkg/CpuHotplugSmm/FirstSmiHandler.nasm b/OvmfPkg/CpuHotplugSmm/FirstSmiHandler.nasm
index 5399b5f..b38f94c 100644
--- a/OvmfPkg/CpuHotplugSmm/FirstSmiHandler.nasm
+++ b/OvmfPkg/CpuHotplugSmm/FirstSmiHandler.nasm
@@ -41,9 +41,12 @@ SMM_DEFAULT_SMBASE: equ 0x3_0000
; Field offsets in FIRST_SMI_HANDLER_CONTEXT, which resides at
; SMM_DEFAULT_SMBASE.
;
-ApicIdGate: equ 0 ; UINT64
-NewSmbase: equ 8 ; UINT32
-AboutToLeaveSmm: equ 12 ; UINT8
+ApicIdGate: equ 0 ; UINT64
+NewSmbase: equ 8 ; UINT32
+FeatureControlHighValue: equ 12 ; UINT32
+FeatureControlLowValue: equ 16 ; UINT32
+FeatureControl: equ 20 ; UINT8
+AboutToLeaveSmm: equ 21 ; UINT8
;
; SMRAM Save State Map field offsets, per the AMD (not Intel) layout that QEMU
@@ -60,6 +63,11 @@ CPUID_SIGNATURE: equ 0x00
CPUID_EXTENDED_TOPOLOGY: equ 0x0B
CPUID_VERSION_INFO: equ 0x01
+;
+; MSR constants, from "MdePkg/Include/Register/Intel/ArchitecturalMsr.h".
+;
+MSR_IA32_FEATURE_CONTROL: equ 0x0000003A
+
GLOBAL ASM_PFX (mFirstSmiHandler) ; UINT8[]
GLOBAL ASM_PFX (mFirstSmiHandlerSize) ; UINT16
@@ -141,6 +149,18 @@ UpdateSmbase:
; Save it to the SMBASE field whose address we calculated in EBX.
;
mov dword [ds : dword ebx], eax
+
+ ;
+ ; Set MSR_IA32_FEATURE_CONTROL if requested.
+ ;
+ cmp byte [ds : dword (SMM_DEFAULT_SMBASE + FeatureControl)], 0
+ je NoFeatureControl
+ mov ecx, MSR_IA32_FEATURE_CONTROL
+ mov edx, dword [ds : dword (SMM_DEFAULT_SMBASE + FeatureControlHighValue)]
+ mov eax, dword [ds : dword (SMM_DEFAULT_SMBASE + FeatureControlLowValue)]
+ wrmsr
+
+NoFeatureControl:
;
; Set AboutToLeaveSmm.
;
diff --git a/OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h b/OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h
index 6039532..0c6deed 100644
--- a/OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h
+++ b/OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h
@@ -36,6 +36,14 @@ typedef struct {
//
UINT32 NewSmbase;
//
+ // The High:Low value for the hot-added CPU to store in
+ // MSR_IA32_FEATURE_CONTROL, assuming MSR_IA32_FEATURE_CONTROL setting is
+ // enabled (i.e., if "FeatureControl" is nonzero).
+ //
+ UINT32 FeatureControlHighValue;
+ UINT32 FeatureControlLowValue;
+ UINT8 FeatureControl;
+ //
// The hot-added CPU sets this field to 1 right before executing the RSM
// instruction. This tells the SMM Monarch to proceed to polling the last
// byte of the normal RAM reserved page (Post-SMM Pen).
diff --git a/OvmfPkg/CpuHotplugSmm/Smbase.c b/OvmfPkg/CpuHotplugSmm/Smbase.c
index dc6f4f4..433633d 100644
--- a/OvmfPkg/CpuHotplugSmm/Smbase.c
+++ b/OvmfPkg/CpuHotplugSmm/Smbase.c
@@ -10,7 +10,9 @@
#include <Library/BaseLib.h> // CpuPause()
#include <Library/BaseMemoryLib.h> // CopyMem()
#include <Library/DebugLib.h> // DEBUG()
+#include <Library/HobLib.h> // GetFirstGuidHob()
#include <Library/LocalApicLib.h> // SendInitSipiSipi()
+#include <Library/PlatformInitLib.h> // EFI_HOB_PLATFORM_INFO
#include <Library/SynchronizationLib.h> // InterlockedCompareExchange64()
#include <Register/Intel/SmramSaveStateMap.h> // SMM_DEFAULT_SMBASE
@@ -132,7 +134,10 @@ SmbaseReleasePostSmmPen (
Note that this effects an "SMRAM to SMRAM" copy.
- Additionally, shut the APIC ID gate in FIRST_SMI_HANDLER_CONTEXT.
+ Additionally, shut the APIC ID gate in FIRST_SMI_HANDLER_CONTEXT, and prepare
+ for configuring MSR_IA32_FEATURE_CONTROL. (The latter depends on a GUID HOB,
+ which does not live in SMRAM; however, if we can't trust the HOB list at this
+ stage, we're doomed anyway.)
This function may only be called from the entry point function of the driver,
and only after PcdQ35SmramAtDefaultSmbase has been determined to be TRUE.
@@ -143,6 +148,7 @@ SmbaseInstallFirstSmiHandler (
)
{
FIRST_SMI_HANDLER_CONTEXT *Context;
+ EFI_HOB_GUID_TYPE *GuidHob;
CopyMem (
(VOID *)(UINTN)(SMM_DEFAULT_SMBASE + SMM_HANDLER_OFFSET),
@@ -152,6 +158,22 @@ SmbaseInstallFirstSmiHandler (
Context = (VOID *)(UINTN)SMM_DEFAULT_SMBASE;
Context->ApicIdGate = MAX_UINT64;
+
+ Context->FeatureControl = 0;
+ GuidHob = GetFirstGuidHob (&gUefiOvmfPkgPlatformInfoGuid);
+ if (GuidHob != NULL) {
+ EFI_HOB_PLATFORM_INFO *Info;
+
+ Info = GET_GUID_HOB_DATA (GuidHob);
+ if (Info->FeatureControl) {
+ Context->FeatureControlHighValue = (UINT32)RShiftU64 (
+ Info->FeatureControlValue,
+ 32
+ );
+ Context->FeatureControlLowValue = (UINT32)Info->FeatureControlValue;
+ Context->FeatureControl = 1;
+ }
+ }
}
/**
diff --git a/OvmfPkg/Include/Library/PlatformInitLib.h b/OvmfPkg/Include/Library/PlatformInitLib.h
index 2d9c662..dc0c280 100644
--- a/OvmfPkg/Include/Library/PlatformInitLib.h
+++ b/OvmfPkg/Include/Library/PlatformInitLib.h
@@ -64,6 +64,7 @@ typedef struct {
UINT32 S3AcpiReservedMemoryBase;
UINT32 S3AcpiReservedMemorySize;
+ BOOLEAN FeatureControl;
UINT64 FeatureControlValue;
BOOLEAN QemuFwCfgChecked;
diff --git a/OvmfPkg/PlatformPei/FeatureControl.c b/OvmfPkg/PlatformPei/FeatureControl.c
index d2ec496..749a07c 100644
--- a/OvmfPkg/PlatformPei/FeatureControl.c
+++ b/OvmfPkg/PlatformPei/FeatureControl.c
@@ -143,6 +143,7 @@ InstallFeatureControlCallback (
return;
}
+ PlatformInfoHob->FeatureControl = TRUE;
QemuFwCfgSelectItem (FwCfgItem);
QemuFwCfgReadBytes (
sizeof (PlatformInfoHob->FeatureControlValue),
diff --git a/OvmfPkg/RiscVVirt/Library/PlatformSecLib/SecEntry.S b/OvmfPkg/RiscVVirt/Library/PlatformSecLib/SecEntry.S
index de42a90..b52becd 100644
--- a/OvmfPkg/RiscVVirt/Library/PlatformSecLib/SecEntry.S
+++ b/OvmfPkg/RiscVVirt/Library/PlatformSecLib/SecEntry.S
@@ -8,6 +8,9 @@
#include "PlatformSecLib.h"
ASM_FUNC (_ModuleEntryPoint)
+/* Prevent stack unwinding from going further */
+li s0, 0
+
/* Use Temp memory as the stack for calling to C code */
li a2, FixedPcdGet32 (PcdOvmfSecPeiTempRamBase)
li a3, FixedPcdGet32 (PcdOvmfSecPeiTempRamSize)
diff --git a/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc b/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
index 4c3eff7..47248f2 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
+++ b/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
@@ -79,7 +79,6 @@
!endif
# RISC-V Architectural Libraries
- CpuExceptionHandlerLib|UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
RiscVSbiLib|MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
RiscVMmuLib|UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf
PlatformBootManagerLib|OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
@@ -153,6 +152,7 @@
PrePiHobListPointerLib|OvmfPkg/RiscVVirt/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
+ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
[LibraryClasses.common.PEI_CORE]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
@@ -163,6 +163,7 @@
ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
+ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
[LibraryClasses.common.PEIM]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
@@ -174,16 +175,19 @@
ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
+ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
[LibraryClasses.common.DXE_CORE]
PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
[LibraryClasses.common.DXE_DRIVER]
SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
[LibraryClasses.common.UEFI_APPLICATION]
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
diff --git a/OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c b/OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c
index 5287cda..8547c76 100644
--- a/OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c
+++ b/OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c
@@ -806,6 +806,7 @@ TdGetEventLog (
@retval FALSE This is NOT a Tcg800155PlatformIdEvent.
**/
+STATIC
BOOLEAN
Is800155Event (
IN VOID *NewEventHdr,
@@ -814,18 +815,26 @@ Is800155Event (
IN UINT32 NewEventSize
)
{
- if ((((TCG_PCR_EVENT2_HDR *)NewEventHdr)->EventType == EV_NO_ACTION) &&
- (NewEventSize >= sizeof (TCG_Sp800_155_PlatformId_Event2)) &&
- ((CompareMem (
- NewEventData,
- TCG_Sp800_155_PlatformId_Event2_SIGNATURE,
- sizeof (TCG_Sp800_155_PlatformId_Event2_SIGNATURE) - 1
- ) == 0) ||
- (CompareMem (
- NewEventData,
- TCG_Sp800_155_PlatformId_Event3_SIGNATURE,
- sizeof (TCG_Sp800_155_PlatformId_Event3_SIGNATURE) - 1
- ) == 0)))
+ if (((TCG_PCR_EVENT2_HDR *)NewEventHdr)->EventType != EV_NO_ACTION) {
+ return FALSE;
+ }
+
+ if ((NewEventSize >= sizeof (TCG_Sp800_155_PlatformId_Event2)) &&
+ (CompareMem (
+ NewEventData,
+ TCG_Sp800_155_PlatformId_Event2_SIGNATURE,
+ sizeof (TCG_Sp800_155_PlatformId_Event2_SIGNATURE) - 1
+ ) == 0))
+ {
+ return TRUE;
+ }
+
+ if ((NewEventSize >= sizeof (TCG_Sp800_155_PlatformId_Event3)) &&
+ (CompareMem (
+ NewEventData,
+ TCG_Sp800_155_PlatformId_Event3_SIGNATURE,
+ sizeof (TCG_Sp800_155_PlatformId_Event3_SIGNATURE) - 1
+ ) == 0))
{
return TRUE;
}
generated by cgit v1.1 at 2025-08-01 05:53:14 +0000