diff options
Diffstat (limited to 'MdePkg/Include')
| -rw-r--r-- | MdePkg/Include/AArch64/AArch64.h | 13 | ||||
| -rw-r--r-- | MdePkg/Include/IndustryStandard/Acpi50.h | 34 | ||||
| -rw-r--r-- | MdePkg/Include/IndustryStandard/Acpi66.h | 184 | ||||
| -rw-r--r-- | MdePkg/Include/Library/ArmLib.h | 12 | ||||
| -rw-r--r-- | MdePkg/Include/Library/BaseRiscVSbiLib.h | 56 | ||||
| -rw-r--r-- | MdePkg/Include/Library/CpuLib.h | 2 |
6 files changed, 236 insertions, 65 deletions
diff --git a/MdePkg/Include/AArch64/AArch64.h b/MdePkg/Include/AArch64/AArch64.h index 4e5830c..a2c5543 100644 --- a/MdePkg/Include/AArch64/AArch64.h +++ b/MdePkg/Include/AArch64/AArch64.h @@ -33,6 +33,9 @@ #define AARCH64_PFR0_FP (0xF << 16)
#define AARCH64_PFR0_GIC (0xF << 24)
+// ID_AA64PFR2 - AArch64 Processor Feature Register 2 definitions
+#define AARCH64_PFR2_GCIE (0xF << 12)
+
// ID_AA64DFR0 - AArch64 Debug Feature Register 0 definitions
#define AARCH64_DFR0_TRACEVER (0xFULL << 4)
#define AARCH64_DFR0_TRBE (0xFULL << 44)
@@ -122,18 +125,16 @@ #define ARM_VECTOR_LOW_A32_FIQ 0x700
#define ARM_VECTOR_LOW_A32_SERR 0x780
-// The ID_AA64ISAR2_EL1 register is not recognized by older
-// assemblers, we need to define it here.
+// Definitions for ID registers introducted post ARMv8.0 and not
+// given symbolic names in all relevant assemblers.
#define ID_AA64ISAR2_EL1 S3_0_C0_C6_2
-// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we
-// build for ARMv8.0, we need to define the register here.
#define ID_AA64MMFR2_EL1 S3_0_C0_C7_2
-// The RNDR register is not recognized by older assemblers,
-// so we need to define it here
#define RNDR S3_3_C2_C4_0
+#define ID_AA64PFR2_EL1 S3_0_C0_C4_2
+
#define VECTOR_BASE(tbl) \
.section .text.##tbl##,"ax"; \
.align 11; \
diff --git a/MdePkg/Include/IndustryStandard/Acpi50.h b/MdePkg/Include/IndustryStandard/Acpi50.h index c98c35f..dd96ab5 100644 --- a/MdePkg/Include/IndustryStandard/Acpi50.h +++ b/MdePkg/Include/IndustryStandard/Acpi50.h @@ -132,6 +132,40 @@ typedef PACKED struct { UINT16 DeviceSelection;
} EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR;
+/// Revision ID of serial bus uart descriptor
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_REVISION_ID 0x1
+
+/// Type specific flags
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_LITTLE_ENDIAN 0x0
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_BIG_ENDIAN 0x1
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_5_BITS_PER_BYTE 0x0
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_6_BITS_PER_BYTE 0x1
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_7_BITS_PER_BYTE 0x2
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_8_BITS_PER_BYTE 0x3
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_9_BITS_PER_BYTE 0x4
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_STOP_BIT_NONE 0x0
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_STOP_BIT_1 0x1
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_STOP_BIT_1_5 0x2
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_STOP_BIT_2 0x3
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_FC_NONE 0x0
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_FC_HW 0x1
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_TSF_FC_XON_XOFF 0x2
+
+/// Parity definitions
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_PARITY_NONE 0x0
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_PARITY_EVEN 0x1
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_PARITY_ODD 0x2
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_PARITY_MARK 0x3
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_PARITY_SPACE 0x4
+
+/// Serial lines in use bits
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_LIN_RTS BIT7
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_LIN_CTS BIT6
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_LIN_DTR BIT5
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_LIN_DSR BIT4
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_LIN_RI BIT3
+#define EFI_ACPI_5_0_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR_LIN_DTD BIT2
+
///
/// Serial Bus Resource Descriptor (UART)
///
diff --git a/MdePkg/Include/IndustryStandard/Acpi66.h b/MdePkg/Include/IndustryStandard/Acpi66.h index b951668..b7bc8ea 100644 --- a/MdePkg/Include/IndustryStandard/Acpi66.h +++ b/MdePkg/Include/IndustryStandard/Acpi66.h @@ -206,7 +206,7 @@ typedef struct { /// FADT Version (as defined in ACPI 6.6 spec.)
///
#define EFI_ACPI_6_6_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
-#define EFI_ACPI_6_6_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x05
+#define EFI_ACPI_6_6_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x06
//
// Fixed ACPI Description Table Preferred Power Management Profile
@@ -324,7 +324,7 @@ typedef struct { ///
/// MADT Revision (as defined in ACPI 6.6 spec.)
///
-#define EFI_ACPI_6_6_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x06
+#define EFI_ACPI_6_6_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x07
///
/// Multiple APIC Flags
@@ -361,6 +361,10 @@ typedef struct { #define EFI_ACPI_6_6_MSI_PIC 0x15
#define EFI_ACPI_6_6_BIO_PIC 0x16
#define EFI_ACPI_6_6_LPC_PIC 0x17
+#define EFI_ACPI_6_6_RINTC 0x18
+#define EFI_ACPI_6_6_IMSIC 0x19
+#define EFI_ACPI_6_6_APLIC 0x1A
+#define EFI_ACPI_6_6_PLIC 0x1B
//
// APIC Structure Definitions
@@ -746,6 +750,83 @@ typedef struct { } EFI_ACPI_6_6_LPC_PIC_STRUCTURE;
///
+/// RISC-V INTC (RINTC)
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Version;
+ UINT8 Reserved;
+ UINT32 Flags;
+ UINT64 HartId;
+ UINT32 Uid;
+ UINT32 ExtIntcId;
+ UINT64 ImsicAddr;
+ UINT32 ImsicSize;
+} EFI_ACPI_6_6_RINTC_STRUCTURE;
+
+#define EFI_ACPI_6_6_RINTC_STRUCTURE_VERSION 1
+
+#define EFI_ACPI_6_6_RINTC_FLAG_ENABLE 1
+
+///
+/// RISC-V Incoming MSI Controller (IMSIC)
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Version;
+ UINT8 Reserved;
+ UINT32 Flags;
+ UINT16 NumIds;
+ UINT16 NumGuestIds;
+ UINT8 GuestIndexBits;
+ UINT8 HartIndexBits;
+ UINT8 GroupIndexBits;
+ UINT8 GroupIndexShift;
+} EFI_ACPI_6_6_IMSIC_STRUCTURE;
+
+#define EFI_ACPI_6_6_IMSIC_STRUCTURE_VERSION 1
+
+///
+/// RISC-V APLIC
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Version;
+ UINT8 Id;
+ UINT32 Flags;
+ UINT8 HwId[8];
+ UINT16 NumIdcs;
+ UINT16 NumSources;
+ UINT32 GsiBase;
+ UINT64 BaseAddr;
+ UINT32 Size;
+} EFI_ACPI_6_6_APLIC_STRUCTURE;
+
+#define EFI_ACPI_6_6_APLIC_STRUCTURE_VERSION 1
+
+///
+/// RISC-V PLIC
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Version;
+ UINT8 Id;
+ UINT8 HwId[8];
+ UINT16 NumIrqs;
+ UINT16 MaxPrio;
+ UINT32 Flags;
+ UINT32 Size;
+ UINT64 BaseAddr;
+ UINT32 GsiBase;
+} EFI_ACPI_6_6_PLIC_STRUCTURE;
+
+#define EFI_ACPI_6_6_PLIC_STRUCTURE_VERSION 1
+
+///
/// Smart Battery Description Table (SBST)
///
typedef struct {
@@ -804,6 +885,8 @@ typedef struct { #define EFI_ACPI_6_6_GICC_AFFINITY 0x03
#define EFI_ACPI_6_6_GIC_ITS_AFFINITY 0x04
#define EFI_ACPI_6_6_GENERIC_INITIATOR_AFFINITY 0x05
+#define EFI_ACPI_6_6_GENERIC_PORT_AFFINITY 0x06
+#define EFI_ACPI_6_6_RINTC_AFFINITY 0x07
///
/// Processor Local APIC/SAPIC Affinity Structure Definition
@@ -890,6 +973,19 @@ typedef struct { UINT32 ItsId;
} EFI_ACPI_6_6_GIC_ITS_AFFINITY_STRUCTURE;
+///
+/// RINTC Affinity Structure Definition
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 ProximityDomain;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+} EFI_ACPI_6_6_RINTC_AFFINITY_STRUCTURE;
+
//
// Generic Initiator Affinity Structure Device Handle Types
// All other values between 0x02 an 0xFF are reserved and
@@ -3024,6 +3120,86 @@ typedef struct { #define EFI_ACPI_6_6_PHAT_RESET_REASON_REASON_POWER_LOSS 0x24
#define EFI_ACPI_6_6_PHAT_RESET_REASON_REASON_POWER_BUTTON 0x25
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Flags;
+ UINT64 TimeBaseFreq;
+ UINT32 NodeCount;
+ UINT32 NodeOffset;
+} EFI_ACPI_6_6_RISCV_HART_CAPABILITIES_TABLE;
+
+#define EFI_ACPI_6_6_RHCT_TABLE_REVISION 1
+//
+// RHCT Flags
+//
+#define EFI_ACPI_6_6_RHCT_FLAG_TIMER_CANNOT_WAKEUP_CPU 1
+
+//
+// RHCT subtables
+//
+typedef struct {
+ UINT16 Type;
+ UINT16 Length;
+ UINT16 Revision;
+} EFI_ACPI_6_6_RHCT_NODE_HEADER;
+
+/* Values for RHCT subtable Type above */
+#define EFI_ACPI_6_6_RHCT_NODE_TYPE_ISA_STRING 0x0000
+#define EFI_ACPI_6_6_RHCT_NODE_TYPE_CMO 0x0001
+#define EFI_ACPI_6_6_RHCT_NODE_TYPE_MMU 0x0002
+#define EFI_ACPI_6_6_RHCT_NODE_TYPE_HART_INFO 0xFFFF
+
+//
+// ISA string node structure
+//
+typedef struct {
+ EFI_ACPI_6_6_RHCT_NODE_HEADER Node;
+ UINT16 IsaLength;
+ char Isa[];
+} EFI_ACPI_6_6_RHCT_ISA_STRING_NODE;
+
+#define EFI_ACPI_6_6_RHCT_ISA_NODE_STRUCTURE_VERSION 1
+
+//
+// CMO node structure
+//
+typedef struct {
+ EFI_ACPI_6_6_RHCT_NODE_HEADER Node;
+ UINT8 Reserved;
+ UINT8 CbomBlockSize;
+ UINT8 CbopBlockSize;
+ UINT8 CbozBlockSize;
+} EFI_ACPI_6_6_RHCT_CMO_NODE;
+
+#define EFI_ACPI_6_6_RHCT_CMO_NODE_STRUCTURE_VERSION 1
+
+//
+// MMU node structure
+//
+typedef struct {
+ EFI_ACPI_6_6_RHCT_NODE_HEADER Node;
+ UINT8 Reserved;
+ UINT8 MmuType;
+} EFI_ACPI_6_6_RHCT_MMU_NODE;
+
+#define EFI_ACPI_6_6_RHCT_MMU_NODE_STRUCTURE_VERSION 1
+
+#define EFI_ACPI_6_6_RHCT_MMU_TYPE_SV39 0
+#define EFI_ACPI_6_6_RHCT_MMU_TYPE_SV48 1
+#define EFI_ACPI_6_6_RHCT_MMU_TYPE_SV57 2
+
+//
+// Hart Info node structure
+//
+typedef struct {
+ EFI_ACPI_6_6_RHCT_NODE_HEADER Node;
+ UINT16 NumOffsets;
+ UINT32 Uid;
+ UINT32 Offsets[];
+} EFI_ACPI_6_6_RHCT_HART_INFO_NODE;
+
+#define EFI_ACPI_6_6_RHCT_HART_INFO_NODE_STRUCTURE_VERSION 1
+
//
// Known table signatures
//
@@ -3284,6 +3460,10 @@ typedef struct { #define EFI_ACPI_6_6_PLATFORM_HEALTH_ASSESSMENT_TABLE_SIGNATURE SIGNATURE_32('P', 'H', 'A', 'T')
///
+/// "RHCT" RISC-V Hart Capabilities Table (RHCT)
+///
+#define EFI_ACPI_6_6_RISCV_HART_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('R', 'H', 'C', 'T')
+///
/// "SDEI" Software Delegated Exceptions Interface Table
///
#define EFI_ACPI_6_6_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')
diff --git a/MdePkg/Include/Library/ArmLib.h b/MdePkg/Include/Library/ArmLib.h index a5823af..52ff1b8 100644 --- a/MdePkg/Include/Library/ArmLib.h +++ b/MdePkg/Include/Library/ArmLib.h @@ -699,6 +699,18 @@ ArmHasGicSystemRegisters ( VOID
);
+/**
+ Check whether the CPU supports the GICv5 system register interface
+
+ @return Whether GICv5 System Register Interface is supported
+
+**/
+BOOLEAN
+EFIAPI
+ArmHasGicV5SystemRegisters (
+ VOID
+ );
+
/** Checks if CCIDX is implemented.
@retval TRUE CCIDX is implemented.
diff --git a/MdePkg/Include/Library/BaseRiscVSbiLib.h b/MdePkg/Include/Library/BaseRiscVSbiLib.h index 2244165..d166671 100644 --- a/MdePkg/Include/Library/BaseRiscVSbiLib.h +++ b/MdePkg/Include/Library/BaseRiscVSbiLib.h @@ -66,13 +66,6 @@ #define SBI_LAST_ERR SBI_ERR_ALREADY_STOPPED
-typedef struct {
- UINT64 BootHartId;
- VOID *PeiServiceTable; // PEI Service table
- VOID *PrePiHobList; // Pre PI Hob List
- UINT64 FlattenedDeviceTree; // Pointer to Flattened Device tree
-} EFI_RISCV_FIRMWARE_CONTEXT;
-
//
// EDK2 OpenSBI firmware extension return status.
//
@@ -110,55 +103,6 @@ SbiSystemReset ( );
/**
- Get firmware context of the calling hart.
-
- @param[out] FirmwareContext The firmware context pointer.
-**/
-VOID
-EFIAPI
-GetFirmwareContext (
- OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContext
- );
-
-/**
- Set firmware context of the calling hart.
-
- @param[in] FirmwareContext The firmware context pointer.
-**/
-VOID
-EFIAPI
-SetFirmwareContext (
- IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext
- );
-
-/**
- Get pointer to OpenSBI Firmware Context
-
- Get the pointer of firmware context.
-
- @param FirmwareContextPtr Pointer to retrieve pointer to the
- Firmware Context.
-**/
-VOID
-EFIAPI
-GetFirmwareContextPointer (
- IN OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContextPtr
- );
-
-/**
- Set pointer to OpenSBI Firmware Context
-
- Set the pointer of firmware context.
-
- @param FirmwareContextPtr Pointer to Firmware Context.
-**/
-VOID
-EFIAPI
-SetFirmwareContextPointer (
- IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContextPtr
- );
-
-/**
Make ECALL in assembly
Switch to M-mode
diff --git a/MdePkg/Include/Library/CpuLib.h b/MdePkg/Include/Library/CpuLib.h index 27f3f82..0ecdaec 100644 --- a/MdePkg/Include/Library/CpuLib.h +++ b/MdePkg/Include/Library/CpuLib.h @@ -42,7 +42,7 @@ CpuFlushTlb ( VOID
);
-#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) || defined (MDE_CPU_LOONGARCH64)
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) || defined (MDE_CPU_LOONGARCH64) || defined (MDE_CPU_RISCV64)
/**
Initialize the CPU floating point units.
|