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Diffstat (limited to 'IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h')
-rw-r--r--IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h99
1 files changed, 48 insertions, 51 deletions
diff --git a/IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h b/IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h
index 49dadba..0000ea7 100644
--- a/IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h
+++ b/IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h
@@ -5,69 +5,66 @@
#pragma pack(1)
-
/** Fsp M Configuration
**/
typedef struct {
-
-/** Offset 0x00C8 - Debug Serial Port Base address
- Debug serial port base address. This option will be used only when the 'Serial Port
- Debug Device' option is set to 'External Device'. 0x00000000(Default).
-**/
- UINT32 SerialDebugPortAddress;
-
-/** Offset 0x00CC - Debug Serial Port Type
- 16550 compatible debug serial port resource type. NONE means no serial port support.
- 0x02:MMIO(Default).
- 0:NONE, 1:I/O, 2:MMIO
-**/
- UINT8 SerialDebugPortType;
-
-/** Offset 0x00CD - Serial Port Debug Device
- Select active serial port device for debug.For SOC UART devices,'Debug Serial Port
- Base' options will be ignored. 0x02:SOC UART2(Default).
- 0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:External Device
-**/
- UINT8 SerialDebugPortDevice;
-
-/** Offset 0x00CE - Debug Serial Port Stride Size
- Debug serial port register map stride size in bytes. 0x00:1, 0x02:4(Default).
- 0:1, 2:4
-**/
- UINT8 SerialDebugPortStrideSize;
-
-/** Offset 0x00CF
-**/
- UINT8 UnusedUpdSpace2[1];
-
-/** Offset 0x00D0
-**/
- UINT8 ReservedFspmUpd[4];
+ /** Offset 0x00C8 - Debug Serial Port Base address
+ Debug serial port base address. This option will be used only when the 'Serial Port
+ Debug Device' option is set to 'External Device'. 0x00000000(Default).
+ **/
+ UINT32 SerialDebugPortAddress;
+
+ /** Offset 0x00CC - Debug Serial Port Type
+ 16550 compatible debug serial port resource type. NONE means no serial port support.
+ 0x02:MMIO(Default).
+ 0:NONE, 1:I/O, 2:MMIO
+ **/
+ UINT8 SerialDebugPortType;
+
+ /** Offset 0x00CD - Serial Port Debug Device
+ Select active serial port device for debug.For SOC UART devices,'Debug Serial Port
+ Base' options will be ignored. 0x02:SOC UART2(Default).
+ 0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:External Device
+ **/
+ UINT8 SerialDebugPortDevice;
+
+ /** Offset 0x00CE - Debug Serial Port Stride Size
+ Debug serial port register map stride size in bytes. 0x00:1, 0x02:4(Default).
+ 0:1, 2:4
+ **/
+ UINT8 SerialDebugPortStrideSize;
+
+ /** Offset 0x00CF
+ **/
+ UINT8 UnusedUpdSpace2[1];
+
+ /** Offset 0x00D0
+ **/
+ UINT8 ReservedFspmUpd[4];
} FSP_M_CONFIG;
/** Fsp M UPD Configuration
**/
typedef struct {
+ /** Offset 0x0000
+ **/
+ FSP_UPD_HEADER FspUpdHeader;
-/** Offset 0x0000
-**/
- FSP_UPD_HEADER FspUpdHeader;
+ /** Offset 0x00A8
+ **/
+ FSPM_ARCH_UPD FspmArchUpd;
-/** Offset 0x00A8
-**/
- FSPM_ARCH_UPD FspmArchUpd;
+ /** Offset 0x00C8
+ **/
+ FSP_M_CONFIG FspmConfig;
-/** Offset 0x00C8
-**/
- FSP_M_CONFIG FspmConfig;
-
-/** Offset 0x00D4
-**/
- UINT8 UnusedUpdSpace3[2];
+ /** Offset 0x00D4
+ **/
+ UINT8 UnusedUpdSpace3[2];
-/** Offset 0x00D6
-**/
- UINT16 UpdTerminator;
+ /** Offset 0x00D6
+ **/
+ UINT16 UpdTerminator;
} FSPM_UPD;
#pragma pack()