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-rw-r--r--IntelFsp2Pkg/Include/FspEas/FspApi.h12
-rw-r--r--IntelFsp2Pkg/Include/Library/FspPlatformLib.h13
-rw-r--r--IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc21
3 files changed, 44 insertions, 2 deletions
diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h b/IntelFsp2Pkg/Include/FspEas/FspApi.h
index 40e063e..e07aa40 100644
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -139,7 +139,7 @@ typedef struct {
///
typedef struct {
///
- /// Revision of the structure is 2 for this version of the specification.
+ /// Revision of the structure is 3 for this version of the specification.
///
UINT8 Revision;
UINT8 Reserved[3];
@@ -152,7 +152,15 @@ typedef struct {
/// occurring during FSP execution.
///
EFI_PHYSICAL_ADDRESS FspDebugHandler;
- UINT8 Reserved1[16];
+ ///
+ /// FspTemporaryRamSize is Optional & valid only when
+ /// FSP image attribute (BIT4) is set. If Programmed as Zero, Platform
+ /// recommended value will be used, otherwise input value will be used
+ /// to configure TemporaryRamSize. Refer FSP Integration guide for valid
+ /// TemporaryRamSize range for each platform.
+ ///
+ UINT32 FspTemporaryRamSize;
+ UINT8 Reserved1[12];
} FSPT_ARCH2_UPD;
///
diff --git a/IntelFsp2Pkg/Include/Library/FspPlatformLib.h b/IntelFsp2Pkg/Include/Library/FspPlatformLib.h
index 081add6..9a8079c 100644
--- a/IntelFsp2Pkg/Include/Library/FspPlatformLib.h
+++ b/IntelFsp2Pkg/Include/Library/FspPlatformLib.h
@@ -121,4 +121,17 @@ FspTempRamExitDone2 (
IN EFI_STATUS Status
);
+/**
+ Calculate TemporaryRam Size using Base address.
+
+ @param[in] TemporaryRamBase the address of target memory
+ @param[out] TemporaryRamSize the size of target memory
+**/
+VOID
+EFIAPI
+ReadTemporaryRamSize (
+ IN UINT32 TemporaryRamBase,
+ OUT UINT32 *TemporaryRamSize
+ );
+
#endif
diff --git a/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc b/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc
index 002a5a1..2168564 100644
--- a/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc
+++ b/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc
@@ -202,6 +202,27 @@
%endmacro
;
+; Save TemporaryRamSize to YMM10[192:255]
+; arg 1:general purpose register which holds TemporaryRamSize
+; Modified: XMM5 and YMM10[192:255]
+;
+%macro SAVE_TEMPORARY_RAM_SIZE 1
+ LYMMN ymm10, xmm5, 1
+ SXMMN xmm5, 1, %1
+ SYMMN ymm10, 1, xmm5
+ %endmacro
+
+;
+; Restore TemporaryRamSize from YMM10[192:255]
+; arg 1:general purpose register where to save TemporaryRamSize
+; Modified: XMM5 and %1
+;
+%macro LOAD_TEMPORARY_RAM_SIZE 1
+ LYMMN ymm10, xmm5, 1
+ LXMMN xmm5, %1, 1
+ %endmacro
+
+;
; YMM7[128:191] for calling stack
; arg 1:Entry
; Modified: RSI, XMM5, YMM7