diff options
Diffstat (limited to 'CorebootModulePkg')
| -rw-r--r-- | CorebootModulePkg/Include/Coreboot.h | 17 | ||||
| -rw-r--r-- | CorebootModulePkg/Include/Library/CbParseLib.h | 26 | ||||
| -rw-r--r-- | CorebootModulePkg/Library/CbParseLib/CbParseLib.c | 32 |
3 files changed, 57 insertions, 18 deletions
diff --git a/CorebootModulePkg/Include/Coreboot.h b/CorebootModulePkg/Include/Coreboot.h index f2f18be..784e0b1 100644 --- a/CorebootModulePkg/Include/Coreboot.h +++ b/CorebootModulePkg/Include/Coreboot.h @@ -80,7 +80,7 @@ struct imd_root { UINT32 max_entries;
UINT32 num_entries;
UINT32 flags;
- UINT32 entry_align;
+ UINT32 entry_align; UINT32 max_offset;
struct imd_entry entries[0];
};
@@ -165,6 +165,21 @@ struct cb_serial { UINT32 type;
UINT32 baseaddr;
UINT32 baud;
+ UINT32 regwidth; + + // Crystal or input frequency to the chip containing the UART. + // Provide the board specific details to allow the payload to + // initialize the chip containing the UART and make independent + // decisions as to which dividers to select and their values + // to eventually arrive at the desired console baud-rate. + UINT32 input_hertz; + + // UART PCI address: bus, device, function + // 1 << 31 - Valid bit, PCI UART in use + // Bus << 20 + // Device << 15 + // Function << 12 + UINT32 uart_pci_addr; };
#define CB_TAG_CONSOLE 0x00010
diff --git a/CorebootModulePkg/Include/Library/CbParseLib.h b/CorebootModulePkg/Include/Library/CbParseLib.h index 170375b..a023246 100644 --- a/CorebootModulePkg/Include/Library/CbParseLib.h +++ b/CorebootModulePkg/Include/Library/CbParseLib.h @@ -30,7 +30,7 @@ CbParseMemoryInfo ( IN UINT64* pLowMemorySize,
IN UINT64* pHighMemorySize
);
-
+ /**
Acquire the coreboot memory table with the given table id
@@ -45,11 +45,11 @@ CbParseMemoryInfo ( **/
RETURN_STATUS
CbParseCbMemTable (
- IN UINT32 TableId,
+ IN UINT32 TableId, IN VOID** pMemTable,
IN UINT32* pMemTableSize
);
-
+ /**
Acquire the acpi table from coreboot
@@ -66,7 +66,7 @@ CbParseAcpiTable ( IN VOID** pMemTable,
IN UINT32* pMemTableSize
);
-
+ /**
Acquire the smbios table from coreboot
@@ -83,7 +83,7 @@ CbParseSmbiosTable ( IN VOID** pMemTable,
IN UINT32* pMemTableSize
);
-
+ /**
Find the required fadt information
@@ -107,13 +107,16 @@ CbParseFadtInfo ( IN UINTN* pPmEvtReg,
IN UINTN* pPmGpeEnReg
);
-
+ /**
Find the serial port information
@param pRegBase Pointer to the base address of serial port registers
@param pRegAccessType Pointer to the access type of serial port registers
+ @param pRegWidth Pointer to the register width in bytes @param pBaudrate Pointer to the serial port baudrate
+ @param pInputHertz Pointer to the input clock frequency + @param pUartPciAddr Pointer to the UART PCI bus, dev and func address @retval RETURN_SUCCESS Successfully find the serial port information.
@retval RETURN_NOT_FOUND Failed to find the serial port information .
@@ -121,9 +124,12 @@ CbParseFadtInfo ( **/
RETURN_STATUS
CbParseSerialInfo (
- IN UINT32* pRegBase,
- IN UINT32* pRegAccessType,
- IN UINT32* pBaudrate
+ OUT UINT32 *pRegBase, + OUT UINT32 *pRegAccessType, + OUT UINT32 *pRegWidth, + OUT UINT32 *pBaudrate, + OUT UINT32 *pInputHertz, + OUT UINT32 *pUartPciAddr );
/**
@@ -141,7 +147,7 @@ CbParseGetCbHeader ( IN UINTN Level,
IN VOID** HeaderPtr
);
-
+ /**
Find the video frame buffer information
diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c index 377abf3..7c81a51 100644 --- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c +++ b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c @@ -33,7 +33,7 @@ @return the UNIT64 value after convertion.
**/
-UINT64
+UINT64 cb_unpack64 (
IN struct cbuint64 val
)
@@ -469,12 +469,12 @@ CbParseFadtInfo ( }
DEBUG ((EFI_D_INFO, "Reset Value 0x%x\n", Fadt->ResetValue));
- if (pPmEvtReg != NULL) {
+ if (pPmEvtReg != NULL) { *pPmEvtReg = Fadt->Pm1aEvtBlk;
DEBUG ((EFI_D_INFO, "PmEvt Reg 0x%x\n", Fadt->Pm1aEvtBlk));
}
- if (pPmGpeEnReg != NULL) {
+ if (pPmGpeEnReg != NULL) { *pPmGpeEnReg = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
DEBUG ((EFI_D_INFO, "PmGpeEn Reg 0x%x\n", *pPmGpeEnReg));
}
@@ -519,15 +519,15 @@ CbParseFadtInfo ( *pResetValue = Fadt->ResetValue;
DEBUG ((EFI_D_ERROR, "Reset Value 0x%x\n", Fadt->ResetValue));
- if (pPmEvtReg != NULL) {
+ if (pPmEvtReg != NULL) { *pPmEvtReg = Fadt->Pm1aEvtBlk;
DEBUG ((EFI_D_INFO, "PmEvt Reg 0x%x\n", Fadt->Pm1aEvtBlk));
}
- if (pPmGpeEnReg != NULL) {
+ if (pPmGpeEnReg != NULL) { *pPmGpeEnReg = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
DEBUG ((EFI_D_INFO, "PmGpeEn Reg 0x%x\n", *pPmGpeEnReg));
- }
+ } return RETURN_SUCCESS;
}
}
@@ -541,7 +541,10 @@ CbParseFadtInfo ( @param pRegBase Pointer to the base address of serial port registers
@param pRegAccessType Pointer to the access type of serial port registers
+ @param pRegWidth Pointer to the register width in bytes @param pBaudrate Pointer to the serial port baudrate
+ @param pInputHertz Pointer to the input clock frequency + @param pUartPciAddr Pointer to the UART PCI bus, dev and func address @retval RETURN_SUCCESS Successfully find the serial port information.
@retval RETURN_NOT_FOUND Failed to find the serial port information .
@@ -551,7 +554,10 @@ RETURN_STATUS CbParseSerialInfo (
OUT UINT32 *pRegBase,
OUT UINT32 *pRegAccessType,
- OUT UINT32 *pBaudrate
+ OUT UINT32 *pRegWidth, + OUT UINT32 *pBaudrate, + OUT UINT32 *pInputHertz, + OUT UINT32 *pUartPciAddr )
{
struct cb_serial *CbSerial;
@@ -569,6 +575,10 @@ CbParseSerialInfo ( *pRegBase = CbSerial->baseaddr;
}
+ if (pRegWidth != NULL) { + *pRegWidth = CbSerial->regwidth; + } + if (pRegAccessType != NULL) {
*pRegAccessType = CbSerial->type;
}
@@ -577,6 +587,14 @@ CbParseSerialInfo ( *pBaudrate = CbSerial->baud;
}
+ if (pInputHertz != NULL) { + *pInputHertz = CbSerial->input_hertz; + } + + if (pUartPciAddr != NULL) { + *pUartPciAddr = CbSerial->uart_pci_addr; + } + return RETURN_SUCCESS;
}
|