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-rw-r--r--ArmPlatformPkg/Sec/AArch64/ModuleEntryPoint.S16
-rw-r--r--ArmPlatformPkg/Sec/Sec.c48
-rw-r--r--ArmPlatformPkg/Sec/Sec.h1
-rw-r--r--ArmPlatformPkg/Sec/Sec.inf2
4 files changed, 59 insertions, 8 deletions
diff --git a/ArmPlatformPkg/Sec/AArch64/ModuleEntryPoint.S b/ArmPlatformPkg/Sec/AArch64/ModuleEntryPoint.S
index 154be11..28cd015 100644
--- a/ArmPlatformPkg/Sec/AArch64/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/Sec/AArch64/ModuleEntryPoint.S
@@ -8,6 +8,19 @@
#include <AsmMacroLib.h>
ASM_FUNC(_ModuleEntryPoint)
+ // Check if register assignment at handoff matches spec
+ MOV64 (x4, 0x14a0fb10b)
+ // Check if x1 holds TransferList signature
+ cmp x1, x4
+ b.ne _SkipTransferList
+
+ // Skip TransferList init if x2 is not equal to 0
+ cbnz x2, _SkipTransferList
+
+ // Set the TransferList Base Address from register x3
+ mov x10, x3
+
+_SkipTransferList:
// Do early platform specific actions
bl ASM_PFX(ArmPlatformPeiBootAction)
@@ -47,7 +60,8 @@ ASM_PFX(MainEntryPoint):
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
MOV64 (x2, FixedPcdGet64(PcdFvBaseAddress))
ldr x0, [x2, #8]
-
+ // Pass the TransferList Base Address
+ mov x1, x10
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
ldr x3, =ASM_PFX(CEntryPoint)
diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index 4535ae7..ec8bec2 100644
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -86,12 +86,14 @@ STATIC CONST EFI_PEI_PPI_DESCRIPTOR gCommonPpiTable[] = {
@param[out] PpiListSize Size of the PPI list in bytes
@param[out] PpiList Pointer to the constructed PPI list
+ @param[in] TransferListBase Pointer to the Transfer List base
**/
STATIC
VOID
CreatePpiList (
OUT UINTN *PpiListSize,
- OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
+ OUT EFI_PEI_PPI_DESCRIPTOR **PpiList,
+ IN VOID *TransferListBase
)
{
EFI_PEI_PPI_DESCRIPTOR *PlatformPpiList;
@@ -111,10 +113,20 @@ CreatePpiList (
// Set the Terminate flag on the last PPI entry
LastPpi = (EFI_PEI_PPI_DESCRIPTOR *)ListBase +
((sizeof (gCommonPpiTable) + PlatformPpiListSize) / sizeof (EFI_PEI_PPI_DESCRIPTOR)) - 1;
+ *PpiListSize = sizeof (gCommonPpiTable) + PlatformPpiListSize;
+
+ // Add the Transfer List PPI after the Common and Platform PPIs
+ if (TransferListBase != NULL) {
+ LastPpi++;
+ LastPpi->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI;
+ LastPpi->Guid = &gArmTransferListPpiGuid;
+ LastPpi->Ppi = TransferListBase;
+ *PpiListSize += sizeof (EFI_PEI_PPI_DESCRIPTOR);
+ }
+
LastPpi->Flags |= EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
- *PpiList = (EFI_PEI_PPI_DESCRIPTOR *)ListBase;
- *PpiListSize = sizeof (gCommonPpiTable) + PlatformPpiListSize;
+ *PpiList = (EFI_PEI_PPI_DESCRIPTOR *)ListBase;
}
/**
@@ -151,12 +163,15 @@ PrintFirmwareVersion (
@param[in] PeiCoreEntryPoint Address in ram of the entrypoint of the PEI
core
+ @param[in] TransferListBaseAddr Address of the Transfer List base address
+
**/
STATIC
VOID
EFIAPI
SecMain (
- IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
+ IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint,
+ IN UINTN TransferListBaseAddr
)
{
EFI_SEC_PEI_HAND_OFF SecCoreData;
@@ -164,8 +179,24 @@ SecMain (
EFI_PEI_PPI_DESCRIPTOR *PpiList;
UINTN TemporaryRamBase;
UINTN TemporaryRamSize;
+ VOID *TransferListBase;
+
+ // Dump the Transfer List
+ TransferListBase = (VOID *)TransferListBaseAddr;
+ if (TransferListBase != NULL) {
+ if (TransferListCheckHeader (TransferListBase) != TRANSFER_LIST_OPS_INVALID) {
+ DEBUG_CODE_BEGIN ();
+ TransferListDump (TransferListBase);
+ DEBUG_CODE_END ();
+ } else {
+ TransferListBase = NULL;
+ DEBUG ((DEBUG_ERROR, "%a: No valid operations possible on TransferList found @ 0x%p\n", __func__, TransferListBase));
+ }
+ } else {
+ DEBUG ((DEBUG_INFO, "%a: No TransferList found, continuing boot\n", __func__));
+ }
- CreatePpiList (&PpiListSize, &PpiList);
+ CreatePpiList (&PpiListSize, &PpiList, TransferListBase);
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
// the base of the primary core stack
@@ -197,10 +228,13 @@ SecMain (
@param[in] PeiCoreEntryPoint Address in ram of the entrypoint of the PEI
core
+ @param[in] TransferListBaseAddr Address of the Transfer List base address
+
**/
VOID
CEntryPoint (
- IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
+ IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint,
+ IN UINTN TransferListBaseAddr
)
{
if (!ArmMmuEnabled ()) {
@@ -237,7 +271,7 @@ CEntryPoint (
ArmPlatformInitialize (ArmReadMpidr ());
// Goto primary Main.
- SecMain (PeiCoreEntryPoint);
+ SecMain (PeiCoreEntryPoint, TransferListBaseAddr);
// PEI Core should always load and never return
ASSERT (FALSE);
diff --git a/ArmPlatformPkg/Sec/Sec.h b/ArmPlatformPkg/Sec/Sec.h
index 56d9f35..c1cd10d 100644
--- a/ArmPlatformPkg/Sec/Sec.h
+++ b/ArmPlatformPkg/Sec/Sec.h
@@ -23,6 +23,7 @@
#include <Library/SerialPortLib.h>
#include <Ppi/TemporaryRamSupport.h>
+#include <Library/ArmTransferListLib.h>
/**
Helper function to switch to a different stack. Implemented in assembler as
diff --git a/ArmPlatformPkg/Sec/Sec.inf b/ArmPlatformPkg/Sec/Sec.inf
index a75ce8d..6206707 100644
--- a/ArmPlatformPkg/Sec/Sec.inf
+++ b/ArmPlatformPkg/Sec/Sec.inf
@@ -48,9 +48,11 @@
PrintLib
SerialPortLib
StackCheckLib
+ ArmTransferListLib
[Ppis]
gEfiTemporaryRamSupportPpiGuid
+ gArmTransferListPpiGuid
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString