3 files changed, 30 insertions, 1 deletions
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index d8711ad..5390bf0 100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -32,7 +32,8 @@
 #define AARCH64_PFR0_GIC  (0xF << 24)
 
 // ID_AA64DFR0 - AArch64 Debug Feature Register 0 definitions
-#define AARCH64_DFR0_TRBE  (0xFULL << 44)
+#define AARCH64_DFR0_TRACEVER  (0xFULL << 4)
+#define AARCH64_DFR0_TRBE      (0xFULL << 44)
 
 // SCR - Secure Configuration Register definitions
 #define SCR_NS   (1 << 0)
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index c2d738c..6aa8a48 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -793,6 +793,18 @@ ArmHasTrbe (
   VOID
   );
 
+/**
+  Checks whether the CPU implements the Embedded Trace Extension.
+
+  @retval TRUE  FEAT_ETE is implemented.
+  @retval FALSE FEAT_ETE is not mplemented.
+**/
+BOOLEAN
+EFIAPI
+ArmHasEte (
+  VOID
+  );
+
 #endif // MDE_CPU_AARCH64
 
 #ifdef MDE_CPU_ARM
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
index 3a46f36..8728546 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
@@ -134,3 +134,19 @@ ArmHasTrbe (
 {
   return ((ArmReadIdAA64Dfr0 () & AARCH64_DFR0_TRBE) != 0);
 }
+
+/**
+  Checks whether the CPU implements the Embedded Trace Extension.
+
+  @retval TRUE  FEAT_ETE is implemented.
+  @retval FALSE FEAT_ETE is not mplemented.
+**/
+BOOLEAN
+EFIAPI
+ArmHasEte (
+  VOID
+  )
+{
+  // The ID_AA64DFR0_EL1.TraceVer field identifies the presence of FEAT_ETE.
+  return ((ArmReadIdAA64Dfr0 () & AARCH64_DFR0_TRACEVER) != 0);
+}