diff options
9 files changed, 40 insertions, 40 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S b/ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S index 8e2b376..7a25f1b 100644 --- a/ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S +++ b/ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S @@ -95,11 +95,11 @@ UINT64 Padding;0x328 // Required for stack alignment
*/
-ASM_GLOBAL ASM_PFX(ExceptionHandlersStart)
-ASM_GLOBAL ASM_PFX(ExceptionHandlersEnd)
-ASM_GLOBAL ASM_PFX(CommonExceptionEntry)
-ASM_GLOBAL ASM_PFX(AsmCommonExceptionEntry)
-ASM_GLOBAL ASM_PFX(CommonCExceptionHandler)
+GCC_ASM_EXPORT(ExceptionHandlersStart)
+GCC_ASM_EXPORT(ExceptionHandlersEnd)
+GCC_ASM_EXPORT(CommonExceptionEntry)
+GCC_ASM_EXPORT(AsmCommonExceptionEntry)
+GCC_ASM_EXPORT(CommonCExceptionHandler)
.text
.align 11
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S b/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S index c6087aa..1ac0108 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S @@ -15,26 +15,26 @@ .text
.align 2
-ASM_GLOBAL ASM_PFX(ArmReadCntFrq)
-ASM_GLOBAL ASM_PFX(ArmWriteCntFrq)
-ASM_GLOBAL ASM_PFX(ArmReadCntPct)
-ASM_GLOBAL ASM_PFX(ArmReadCntkCtl)
-ASM_GLOBAL ASM_PFX(ArmWriteCntkCtl)
-ASM_GLOBAL ASM_PFX(ArmReadCntpTval)
-ASM_GLOBAL ASM_PFX(ArmWriteCntpTval)
-ASM_GLOBAL ASM_PFX(ArmReadCntpCtl)
-ASM_GLOBAL ASM_PFX(ArmWriteCntpCtl)
-ASM_GLOBAL ASM_PFX(ArmReadCntvTval)
-ASM_GLOBAL ASM_PFX(ArmWriteCntvTval)
-ASM_GLOBAL ASM_PFX(ArmReadCntvCtl)
-ASM_GLOBAL ASM_PFX(ArmWriteCntvCtl)
-ASM_GLOBAL ASM_PFX(ArmReadCntvCt)
-ASM_GLOBAL ASM_PFX(ArmReadCntpCval)
-ASM_GLOBAL ASM_PFX(ArmWriteCntpCval)
-ASM_GLOBAL ASM_PFX(ArmReadCntvCval)
-ASM_GLOBAL ASM_PFX(ArmWriteCntvCval)
-ASM_GLOBAL ASM_PFX(ArmReadCntvOff)
-ASM_GLOBAL ASM_PFX(ArmWriteCntvOff)
+GCC_ASM_EXPORT(ArmReadCntFrq)
+GCC_ASM_EXPORT(ArmWriteCntFrq)
+GCC_ASM_EXPORT(ArmReadCntPct)
+GCC_ASM_EXPORT(ArmReadCntkCtl)
+GCC_ASM_EXPORT(ArmWriteCntkCtl)
+GCC_ASM_EXPORT(ArmReadCntpTval)
+GCC_ASM_EXPORT(ArmWriteCntpTval)
+GCC_ASM_EXPORT(ArmReadCntpCtl)
+GCC_ASM_EXPORT(ArmWriteCntpCtl)
+GCC_ASM_EXPORT(ArmReadCntvTval)
+GCC_ASM_EXPORT(ArmWriteCntvTval)
+GCC_ASM_EXPORT(ArmReadCntvCtl)
+GCC_ASM_EXPORT(ArmWriteCntvCtl)
+GCC_ASM_EXPORT(ArmReadCntvCt)
+GCC_ASM_EXPORT(ArmReadCntpCval)
+GCC_ASM_EXPORT(ArmWriteCntpCval)
+GCC_ASM_EXPORT(ArmReadCntvCval)
+GCC_ASM_EXPORT(ArmWriteCntvCval)
+GCC_ASM_EXPORT(ArmReadCntvOff)
+GCC_ASM_EXPORT(ArmWriteCntvOff)
ASM_PFX(ArmReadCntFrq):
mrs x0, cntfrq_el0 // Read CNTFRQ
diff --git a/ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoaderHelper.S b/ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoaderHelper.S index f97bf15..525c128 100644 --- a/ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoaderHelper.S +++ b/ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoaderHelper.S @@ -25,7 +25,7 @@ .text
.align 3
-ASM_GLOBAL ASM_PFX(SecondariesPenStart)
+GCC_ASM_EXPORT(SecondariesPenStart)
ASM_GLOBAL SecondariesPenEnd
ASM_PFX(SecondariesPenStart):
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S b/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S index 18433b3..66102da 100644 --- a/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S +++ b/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S @@ -31,7 +31,7 @@ .align 2
-ASM_GLOBAL ASM_PFX(memcpy)
+GCC_ASM_EXPORT(memcpy)
// Taken from Newlib BSD implementation.
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S index 20554a6..a07ed97 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S @@ -20,10 +20,10 @@ .text
.align 3
-ASM_GLOBAL ASM_PFX(ArmPlatformSecBootAction)
-ASM_GLOBAL ASM_PFX(ArmPlatformSecBootMemoryInit)
-ASM_GLOBAL ASM_PFX(ArmSecMpCoreSecondariesWrite)
-ASM_GLOBAL ASM_PFX(ArmSecMpCoreSecondariesRead)
+GCC_ASM_EXPORT(ArmPlatformSecBootAction)
+GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
+GCC_ASM_EXPORT(ArmSecMpCoreSecondariesWrite)
+GCC_ASM_EXPORT(ArmSecMpCoreSecondariesRead)
/**
Call at the beginning of the platform boot up
diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S index 1fc39e6..cdc8d92 100644 --- a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S +++ b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S @@ -18,7 +18,7 @@ .text
.align 11
-ASM_GLOBAL ASM_PFX(PeiVectorTable)
+GCC_ASM_EXPORT(PeiVectorTable)
//============================================================
//Default Exception Handlers
diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S b/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S index a11cda0..8e23b03 100644 --- a/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S +++ b/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S @@ -18,8 +18,8 @@ .text
.align 3
-ASM_GLOBAL ASM_PFX(SetupExceptionLevel1)
-ASM_GLOBAL ASM_PFX(SetupExceptionLevel2)
+GCC_ASM_EXPORT(SetupExceptionLevel1)
+GCC_ASM_EXPORT(SetupExceptionLevel2)
// Setup EL1 while in EL1
ASM_PFX(SetupExceptionLevel1):
diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S b/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S index d3fcd0a..8d83510 100644 --- a/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S +++ b/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S @@ -17,7 +17,7 @@ .text
.align 3
-ASM_GLOBAL ASM_PFX(SecSwitchStack)
+GCC_ASM_EXPORT(SecSwitchStack)
diff --git a/ArmPlatformPkg/Sec/AArch64/Helper.S b/ArmPlatformPkg/Sec/AArch64/Helper.S index 490d3df..259aca4 100644 --- a/ArmPlatformPkg/Sec/AArch64/Helper.S +++ b/ArmPlatformPkg/Sec/AArch64/Helper.S @@ -18,11 +18,11 @@ .text
.align 3
-ASM_GLOBAL ASM_PFX(SwitchToNSExceptionLevel1)
-ASM_GLOBAL ASM_PFX(enter_monitor_mode)
-ASM_GLOBAL ASM_PFX(return_from_exception)
-ASM_GLOBAL ASM_PFX(copy_cpsr_into_spsr)
-ASM_GLOBAL ASM_PFX(set_non_secure_mode)
+GCC_ASM_EXPORT(SwitchToNSExceptionLevel1)
+GCC_ASM_EXPORT(enter_monitor_mode)
+GCC_ASM_EXPORT(return_from_exception)
+GCC_ASM_EXPORT(copy_cpsr_into_spsr)
+GCC_ASM_EXPORT(set_non_secure_mode)
// Switch from EL3 to NS-EL1
ASM_PFX(SwitchToNSExceptionLevel1):
|