UefiPayloadPkg: Enhance UEFI payload for coreboot and Slim Bootloader

CorebootModulePkg and CorebootPayloadPkg originally supports coreboot only.
In order to support other bootloaders, such as Slim Bootloader, they need
be updated to be more generic.
UEFI Payload (UefiPayloadPkg) a converged package from CorebootModulePkg
and CorebootPayloadPkg with following updates:
a. Support both coreboot and Slim Bootloader
b. Removed SataControllerDxe and BaseSerialPortLib16550 to use EDK2 modules
c. Support passing bootloader parameter to UEFI payload, e.g. coreboot
   table from coreboot or HOB list from Slim Bootloader
d. Using GraphicsOutputDxe from EDK2 with minor change instead of FbGop
e. Remove the dependency to IntelFrameworkPkg and IntelFrameworkModulePkg
   and QuarkSocPkg
f. Use BaseDebugLibSerialPort library as DebugLib
g. Use HPET timer, drop legacy 8254 timer support
h. Use BaseXApicX2ApicLib instead of BaseXApicLib
i. Remove HOB gUefiFrameBufferInfoGuid to use EDK2 graphics HOBs.
j. Other clean ups

On how UefiPayloadPkg could work with coreboot/Slim Bootloader, please
refer UefiPayloadPkg/BuildAndIntegrationInstructions.txt

Once UefiPayloadPkg is checked-in, CorebootModulePkg and CorebootPayloadPkg
could be retired.

Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

7 files changed, 519 insertions, 0 deletions

diff --git a/UefiPayloadPkg/Include/Coreboot.h b/UefiPayloadPkg/Include/Coreboot.h
new file mode 100644
index 0000000..8a6c300
--- /dev/null
+++ b/UefiPayloadPkg/Include/Coreboot.h
@@ -0,0 +1,249 @@
+/** @file

+  Coreboot PEI module include file.

+

+  Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/*

+ * This file is part of the libpayload project.

+ *

+ * Copyright (C) 2008 Advanced Micro Devices, Inc.

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in the

+ *    documentation and/or other materials provided with the distribution.

+ * 3. The name of the author may not be used to endorse or promote products

+ *    derived from this software without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND

+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE

+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS

+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)

+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY

+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

+ * SUCH DAMAGE.

+ */

+

+

+#ifndef _COREBOOT_PEI_H_INCLUDED_

+#define _COREBOOT_PEI_H_INCLUDED_

+

+#if defined(_MSC_VER)

+#pragma warning( disable : 4200 )

+#endif

+

+#define DYN_CBMEM_ALIGN_SIZE (4096)

+

+#define IMD_ENTRY_MAGIC      (~0xC0389481)

+#define CBMEM_ENTRY_MAGIC    (~0xC0389479)

+

+struct cbmem_entry {

+  UINT32 magic;

+  UINT32 start;

+  UINT32 size;

+  UINT32 id;

+};

+

+struct cbmem_root {

+  UINT32 max_entries;

+  UINT32 num_entries;

+  UINT32 locked;

+  UINT32 size;

+  struct cbmem_entry entries[0];

+};

+

+struct imd_entry {

+  UINT32 magic;

+  UINT32 start_offset;

+  UINT32 size;

+  UINT32 id;

+};

+

+struct imd_root {

+  UINT32 max_entries;

+  UINT32 num_entries;

+  UINT32 flags;

+  UINT32 entry_align;

+  UINT32 max_offset;

+  struct imd_entry entries[0];

+};

+

+struct cbuint64 {

+  UINT32 lo;

+  UINT32 hi;

+};

+

+#define CB_HEADER_SIGNATURE 0x4F49424C

+

+struct cb_header {

+  UINT32 signature;

+  UINT32 header_bytes;

+  UINT32 header_checksum;

+  UINT32 table_bytes;

+  UINT32 table_checksum;

+  UINT32 table_entries;

+};

+

+struct cb_record {

+  UINT32 tag;

+  UINT32 size;

+};

+

+#define CB_TAG_UNUSED     0x0000

+#define CB_TAG_MEMORY     0x0001

+

+struct cb_memory_range {

+  struct cbuint64 start;

+  struct cbuint64 size;

+  UINT32 type;

+};

+

+#define CB_MEM_RAM    1

+#define CB_MEM_RESERVED     2

+#define CB_MEM_ACPI   3

+#define CB_MEM_NVS    4

+#define CB_MEM_UNUSABLE     5

+#define CB_MEM_VENDOR_RSVD  6

+#define CB_MEM_TABLE       16

+

+struct cb_memory {

+  UINT32 tag;

+  UINT32 size;

+  struct cb_memory_range map[0];

+};

+

+#define CB_TAG_MAINBOARD  0x0003

+

+struct cb_mainboard {

+  UINT32 tag;

+  UINT32 size;

+  UINT8 vendor_idx;

+  UINT8 part_number_idx;

+  UINT8 strings[0];

+};

+#define CB_TAG_VERSION  0x0004

+#define CB_TAG_EXTRA_VERSION  0x0005

+#define CB_TAG_BUILD    0x0006

+#define CB_TAG_COMPILE_TIME   0x0007

+#define CB_TAG_COMPILE_BY     0x0008

+#define CB_TAG_COMPILE_HOST   0x0009

+#define CB_TAG_COMPILE_DOMAIN 0x000a

+#define CB_TAG_COMPILER       0x000b

+#define CB_TAG_LINKER   0x000c

+#define CB_TAG_ASSEMBLER      0x000d

+

+struct cb_string {

+  UINT32 tag;

+  UINT32 size;

+  UINT8 string[0];

+};

+

+#define CB_TAG_SERIAL   0x000f

+

+struct cb_serial {

+  UINT32 tag;

+  UINT32 size;

+#define CB_SERIAL_TYPE_IO_MAPPED     1

+#define CB_SERIAL_TYPE_MEMORY_MAPPED 2

+  UINT32 type;

+  UINT32 baseaddr;

+  UINT32 baud;

+  UINT32 regwidth;

+

+  // Crystal or input frequency to the chip containing the UART.

+  // Provide the board specific details to allow the payload to

+  // initialize the chip containing the UART and make independent

+  // decisions as to which dividers to select and their values

+  // to eventually arrive at the desired console baud-rate.

+  UINT32 input_hertz;

+

+  // UART PCI address: bus, device, function

+  // 1 << 31 - Valid bit, PCI UART in use

+  // Bus << 20

+  // Device << 15

+  // Function << 12

+  UINT32 uart_pci_addr;

+};

+

+#define CB_TAG_CONSOLE       0x00010

+

+struct cb_console {

+  UINT32 tag;

+  UINT32 size;

+  UINT16 type;

+};

+

+#define CB_TAG_CONSOLE_SERIAL8250 0

+#define CB_TAG_CONSOLE_VGA  1 // OBSOLETE

+#define CB_TAG_CONSOLE_BTEXT      2 // OBSOLETE

+#define CB_TAG_CONSOLE_LOGBUF     3

+#define CB_TAG_CONSOLE_SROM       4 // OBSOLETE

+#define CB_TAG_CONSOLE_EHCI       5

+

+#define CB_TAG_FORWARD       0x00011

+

+struct cb_forward {

+  UINT32 tag;

+  UINT32 size;

+  UINT64 forward;

+};

+

+#define CB_TAG_FRAMEBUFFER      0x0012

+struct cb_framebuffer {

+  UINT32 tag;

+  UINT32 size;

+

+  UINT64 physical_address;

+  UINT32 x_resolution;

+  UINT32 y_resolution;

+  UINT32 bytes_per_line;

+  UINT8 bits_per_pixel;

+  UINT8 red_mask_pos;

+  UINT8 red_mask_size;

+  UINT8 green_mask_pos;

+  UINT8 green_mask_size;

+  UINT8 blue_mask_pos;

+  UINT8 blue_mask_size;

+  UINT8 reserved_mask_pos;

+  UINT8 reserved_mask_size;

+};

+

+#define CB_TAG_VDAT     0x0015

+struct cb_vdat {

+  UINT32 tag;

+  UINT32 size;  /* size of the entire entry */

+  UINT64 vdat_addr;

+  UINT32 vdat_size;

+};

+

+#define CB_TAG_TIMESTAMPS       0x0016

+#define CB_TAG_CBMEM_CONSOLE    0x0017

+#define CB_TAG_MRC_CACHE  0x0018

+struct cb_cbmem_tab {

+  UINT32 tag;

+  UINT32 size;

+  UINT64 cbmem_tab;

+};

+

+/* Helpful macros */

+

+#define MEM_RANGE_COUNT(_rec) \

+  (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))

+

+#define MEM_RANGE_PTR(_rec, _idx) \

+  (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \

+    + (sizeof((_rec)->map[0]) * (_idx)))

+

+

+#endif // _COREBOOT_PEI_H_INCLUDED_

diff --git a/UefiPayloadPkg/Include/Guid/AcpiBoardInfoGuid.h b/UefiPayloadPkg/Include/Guid/AcpiBoardInfoGuid.h
new file mode 100644
index 0000000..fe783fe
--- /dev/null
+++ b/UefiPayloadPkg/Include/Guid/AcpiBoardInfoGuid.h
@@ -0,0 +1,29 @@
+/** @file

+  This file defines the hob structure for board related information from acpi table

+

+  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef __ACPI_BOARD_INFO_GUID_H__

+#define __ACPI_BOARD_INFO_GUID_H__

+

+///

+/// Board information GUID

+///

+extern EFI_GUID gUefiAcpiBoardInfoGuid;

+

+typedef struct {

+  UINT8              Revision;

+  UINT8              Reserved0[2];

+  UINT8              ResetValue;

+  UINT64             PmEvtBase;

+  UINT64             PmGpeEnBase;

+  UINT64             PmCtrlRegBase;

+  UINT64             PmTimerRegBase;

+  UINT64             ResetRegAddress;

+  UINT64             PcieBaseAddress;

+} ACPI_BOARD_INFO;

+

+#endif

diff --git a/UefiPayloadPkg/Include/Guid/MemoryMapInfoGuid.h b/UefiPayloadPkg/Include/Guid/MemoryMapInfoGuid.h
new file mode 100644
index 0000000..99187e8
--- /dev/null
+++ b/UefiPayloadPkg/Include/Guid/MemoryMapInfoGuid.h
@@ -0,0 +1,36 @@
+/** @file

+  This file defines the hob structure for memory map information.

+

+  Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef __MEMORY_MAP_INFO_GUID_H__

+#define __MEMORY_MAP_INFO_GUID_H__

+

+#include <Library/PcdLib.h>

+

+///

+/// Memory Map Information GUID

+///

+extern EFI_GUID gLoaderMemoryMapInfoGuid;

+

+#pragma pack(1)

+typedef struct {

+  UINT64 Base;

+  UINT64 Size;

+  UINT8  Type;

+  UINT8  Flag;

+  UINT8  Reserved[6];

+} MEMROY_MAP_ENTRY;

+

+typedef struct {

+  UINT8  Revision;

+  UINT8  Reserved0[3];

+  UINT32 Count;

+  MEMROY_MAP_ENTRY  Entry[0];

+} MEMROY_MAP_INFO;

+#pragma pack()

+

+#endif

diff --git a/UefiPayloadPkg/Include/Guid/SerialPortInfoGuid.h b/UefiPayloadPkg/Include/Guid/SerialPortInfoGuid.h
new file mode 100644
index 0000000..a15d5b8
--- /dev/null
+++ b/UefiPayloadPkg/Include/Guid/SerialPortInfoGuid.h
@@ -0,0 +1,31 @@
+/** @file

+  This file defines the hob structure for serial port.

+

+  Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef __SERIAL_PORT_INFO_GUID_H__

+#define __SERIAL_PORT_INFO_GUID_H__

+

+///

+/// Serial Port Information GUID

+///

+extern EFI_GUID gUefiSerialPortInfoGuid;

+

+#define PLD_SERIAL_TYPE_IO_MAPPED     1

+#define PLD_SERIAL_TYPE_MEMORY_MAPPED 2

+

+typedef struct {

+  UINT8  Revision;

+  UINT8  Reserved0[3];

+  UINT32 Type;

+  UINT32 BaseAddr;

+  UINT32 Baud;

+  UINT32 RegWidth;

+  UINT32 InputHertz;

+  UINT32 UartPciAddr;

+} SERIAL_PORT_INFO;

+

+#endif

diff --git a/UefiPayloadPkg/Include/Guid/SystemTableInfoGuid.h b/UefiPayloadPkg/Include/Guid/SystemTableInfoGuid.h
new file mode 100644
index 0000000..2446820
--- /dev/null
+++ b/UefiPayloadPkg/Include/Guid/SystemTableInfoGuid.h
@@ -0,0 +1,26 @@
+/** @file

+  This file defines the hob structure for system tables like ACPI, SMBIOS tables.

+

+  Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef __SYSTEM_TABLE_INFO_GUID_H__

+#define __SYSTEM_TABLE_INFO_GUID_H__

+

+///

+/// System Table Information GUID

+///

+extern EFI_GUID gUefiSystemTableInfoGuid;

+

+typedef struct {

+  UINT8     Revision;

+  UINT8     Reserved0[3];

+  UINT64    AcpiTableBase;

+  UINT32    AcpiTableSize;

+  UINT64    SmbiosTableBase;

+  UINT32    SmbiosTableSize;

+} SYSTEM_TABLE_INFO;

+

+#endif

diff --git a/UefiPayloadPkg/Include/Library/BlParseLib.h b/UefiPayloadPkg/Include/Library/BlParseLib.h
new file mode 100644
index 0000000..3f9e591
--- /dev/null
+++ b/UefiPayloadPkg/Include/Library/BlParseLib.h
@@ -0,0 +1,120 @@
+/** @file

+  This library will parse the coreboot table in memory and extract those required

+  information.

+

+  Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+#include <PiPei.h>

+#include <Guid/GraphicsInfoHob.h>

+#include <Guid/MemoryMapInfoGuid.h>

+#include <Guid/SerialPortInfoGuid.h>

+#include <Guid/SystemTableInfoGuid.h>

+#include <Guid/AcpiBoardInfoGuid.h>

+

+#ifndef __BOOTLOADER_PARSE_LIB__

+#define __BOOTLOADER_PARSE_LIB__

+

+#define GET_BOOTLOADER_PARAMETER()      (*(UINT32 *)(UINTN)(PcdGet32(PcdPayloadStackTop) - sizeof(UINT32)))

+#define SET_BOOTLOADER_PARAMETER(Value) GET_BOOTLOADER_PARAMETER()=Value

+

+typedef RETURN_STATUS \

+        (*BL_MEM_INFO_CALLBACK) (MEMROY_MAP_ENTRY *MemoryMapEntry, VOID *Param);

+

+/**

+  This function retrieves the parameter base address from boot loader.

+

+  This function will get bootloader specific parameter address for UEFI payload.

+  e.g. HobList pointer for Slim Bootloader, and coreboot table header for Coreboot.

+

+  @retval NULL            Failed to find the GUID HOB.

+  @retval others          GUIDed HOB data pointer.

+

+**/

+VOID *

+EFIAPI

+GetParameterBase (

+  VOID

+  );

+

+/**

+  Acquire the memory map information.

+

+  @param  MemInfoCallback     The callback routine

+  @param  Params              Pointer to the callback routine parameter

+

+  @retval RETURN_SUCCESS     Successfully find out the memory information.

+  @retval RETURN_NOT_FOUND   Failed to find the memory information.

+

+**/

+RETURN_STATUS

+EFIAPI

+ParseMemoryInfo (

+  IN  BL_MEM_INFO_CALLBACK       MemInfoCallback,

+  IN  VOID                       *Params

+  );

+

+/**

+  Acquire acpi table and smbios table from slim bootloader

+

+  @param  SystemTableInfo           Pointer to the system table info

+

+  @retval RETURN_SUCCESS            Successfully find out the tables.

+  @retval RETURN_NOT_FOUND          Failed to find the tables.

+

+**/

+RETURN_STATUS

+EFIAPI

+ParseSystemTable (

+  OUT SYSTEM_TABLE_INFO     *SystemTableInfo

+  );

+

+

+/**

+  Find the serial port information

+

+  @param  SERIAL_PORT_INFO   Pointer to serial port info structure

+

+  @retval RETURN_SUCCESS     Successfully find the serial port information.

+  @retval RETURN_NOT_FOUND   Failed to find the serial port information .

+

+**/

+RETURN_STATUS

+EFIAPI

+ParseSerialInfo (

+  OUT SERIAL_PORT_INFO     *SerialPortInfo

+  );

+

+

+/**

+  Find the video frame buffer information

+

+  @param  GfxInfo             Pointer to the EFI_PEI_GRAPHICS_INFO_HOB structure

+

+  @retval RETURN_SUCCESS     Successfully find the video frame buffer information.

+  @retval RETURN_NOT_FOUND   Failed to find the video frame buffer information .

+

+**/

+RETURN_STATUS

+EFIAPI

+ParseGfxInfo (

+  OUT EFI_PEI_GRAPHICS_INFO_HOB       *GfxInfo

+  );

+

+/**

+  Find the video frame buffer device information

+

+  @param  GfxDeviceInfo      Pointer to the EFI_PEI_GRAPHICS_DEVICE_INFO_HOB structure

+

+  @retval RETURN_SUCCESS     Successfully find the video frame buffer information.

+  @retval RETURN_NOT_FOUND   Failed to find the video frame buffer information .

+

+**/

+RETURN_STATUS

+EFIAPI

+ParseGfxDeviceInfo (

+  OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB       *GfxDeviceInfo

+  );

+

+#endif

diff --git a/UefiPayloadPkg/Include/Library/PlatformSupportLib.h b/UefiPayloadPkg/Include/Library/PlatformSupportLib.h
new file mode 100644
index 0000000..d9f0b83
--- /dev/null
+++ b/UefiPayloadPkg/Include/Library/PlatformSupportLib.h
@@ -0,0 +1,28 @@
+/** @file

+  Bootloader Platform Support library. Platform can provide an implementation of this

+  library class to provide hooks that may be required for some type of

+  platform features.

+

+Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef __BOOTLOADER_PLATFORM_SUPPORT_LIB__

+#define __BOOTLOADER_PLATFORM_SUPPORT_LIB__

+

+/**

+  Parse platform specific information from bootloader

+

+  @retval RETURN_SUCCESS       The platform specific coreboot support succeeded.

+  @retval RETURN_DEVICE_ERROR  The platform specific coreboot support could not be completed.

+

+**/

+EFI_STATUS

+EFIAPI

+ParsePlatformInfo (

+  VOID

+  );

+

+#endif // __BOOTLOADER_PLATFORM_SUPPORT_LIB__

+